MAX196ACAI datasheet(5/16 Pages) MAXIM

5 / 16 page

Multirange, Single +5V, 12-Bit DAS

with 12-Bit Bus Interface

_______________________________________________________________________________________

Note 1:

Accuracy specifications tested at VDD = 5.0V. Performance at power-supply tolerance limits guaranteed by Power-Supply

Rejection test. Tested for the ±10V (MAX196) and ±4.096V (MAX198) input ranges.

Note 2:

External reference: VREF = 4.096V, offset error nulled, ideal last code transition = FS - 3/2LSB.

Note 3:

Ground “on” channel; sine wave applied to all “off” channels.

Note 4:

Maximum full-power input frequency for 1LSB error with 10ns jitter = 3kHz.

Note 5:

Guaranteed by design. Not tested.

Note 6:

Use static loads only.

Note 7:

Tested using internal reference.

Note 8:

PSRR measured at full-scale.

Note 9:

External acquisition timing: starts at data valid at ACQMOD = low control byte; ends at rising edge of WR with ACQMOD

= high control byte.

Note 10: Not subject to production testing. Provided for design guidance only.

Note 11: All input control signals specified with tR = tF = 5ns from a voltage level of 0.8V to 2.4V.

Note 12: tDO is measured with the load circuits of Figure 2 and defined as the time required for an output to cross 0.8V or 2.4V.

Note 13: tTR is defined as the time required for the data lines to change by 0.5V.

TIMING CHARACTERISTICS

(VDD = 5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7µF at REF pin; external clock, fCLK = 2.0MHz

with 50% duty cycle; TA = TMIN to TMAX; unless otherwise noted.)

ELECTRICAL CHARACTERISTICS (continued)

(VDD = 5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7µF at REF pin; external clock, fCLK = 2.0MHz

with 50% duty cycle; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.)

Three-State Output Capacitance

COUT

(Note 5)

Output High Voltage

VOH

VDD - 1

VDD = 4.75V, ISOURCE = 1mA

Output Low Voltage

VOL

0.4

VDD = 4.75V, ISINK = 1.6mA

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

CONDITIONS

DIGITAL OUTPUTS (D11–D0, INT)

RD Low to Output Data Valid

tDO

120

Figure 2, CL = 100pF (Note 12)

Data Valid to WR Setup

Data Valid to WR Hold

tDH

tDS

CLK to WR Setup Time

CLK to WR Hold Time

tCWH

tCWS

100

CS to RD Setup Time

CS to RD Hold Time

tCSRH

tCSRS

CS to WR Setup Time

CS to WR Hold Time

tCSWH

tCSWS

WR Pulse Width

tWR

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

CS Pulse Width

tCS

RD Low to INT High Delay

tINT1

120

RD High to Output Disable

tTR

CONDITIONS

(Note 13)

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