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PIC16C770-04/SS Datasheet(PDF) 76 Page - Microchip Technology

Part # PIC16C770-04/SS
Description  18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D
PDF  200 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16C770-04/SS Datasheet(HTML) 76 Page - Microchip Technology

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PIC16C717/770/771
DS41120A-page 76
Advanced Information
© 1999 Microchip Technology Inc.
9.1.7
SLEEP OPERATION
In master mode, all module clocks are halted and the
transmission/reception will remain in that state until the
device wakes from sleep. After the device returns to
normal mode, the module will continue to transmit/
receive data.
In slave mode, the SPI transmit/receive shift register
operates asynchronously to the device. This allows the
device to be placed in sleep mode and data to be
shifted into the SPI transmit/receive shift register.
When all 8 bits have been received, the MSSP interrupt
flag bit will be set and if enabled will wake the device
from sleep.
9.1.8
EFFECTS OF A RESET
A reset disables the MSSP module and terminates the
current transfer.
TABLE 9-1:
REGISTERS ASSOCIATED WITH SPI OPERATION
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
POR, BOR
MCLR, WDT
0Bh, 8Bh,
10Bh,18Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
0Ch
PIR1
—
ADIF
—
—
SSPIF
CCP1IF
TMR2IF
TMR1IF
-0-- 0000
-0-- 0000
8Ch
PIE1
—
ADIE
—
—SSPIE
CCP1IE
TMR2IE
TMR1IE
-0-- 0000
-0-- 0000
13h
SSPBUF
Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx
uuuu uuuu
14h
SSPCON
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
0000 0000
0000 0000
94h
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF
0000 0000
0000 0000
Legend: x = unknown, u = unchanged, - = unimplemented read as ’0’. Shaded cells are not used by the MSSP in SPI mode.



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