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PIC17C752-08/CL Datasheet(PDF) 62 Page - Microchip Technology

Part # PIC17C752-08/CL
Description  High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D
PDF  328 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC17C752-08/CL Datasheet(HTML) 62 Page - Microchip Technology

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PIC17C7XX
DS30289A-page 62
© 1998 Microchip Technology Inc.
8.3
Table Reads
The table read allows the program memory to be read.
This allows constants to be stored in the program
memory space, and retrieved into data memory when
needed. Example 8-2 reads the 16-bit value at pro-
gram memory address TBLPTR.
After the dummy
byte has been read from the TABLATH, the TABLATH
is loaded with the 16-bit data from program memory
address TBLPTR, and then increments the TBLPTR
value. The first read loads the data into the latch, and
can be considered a dummy read (unknown data
loaded into 'f'). INDF0 should be configured for either
auto-increment or auto-decrement.
EXAMPLE 8-2:
TABLE READ
MOVLW
HIGH (TBL_ADDR) ; Load the Table
MOVWF
TBLPTRH
;
address
MOVLW
LOW (TBL_ADDR)
;
MOVWF
TBLPTRL
;
TABLRD
0, 1, DUMMY
; Dummy read,
;
Updates TABLATH
;
Increments TBLPTR
TLRD
1, INDF0
; Read HI byte
;
of TABLATH
TABLRD
0, 1, INDF0
; Read LO byte
;
of TABLATL and
;
Update TABLATH
;
Increment TBLPTR
FIGURE 8-7:
TABLRD
TIMING
FIGURE 8-8:
TABLRD
TIMING (CONSECUTIVE TABLRD INSTRUCTIONS)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
AD15:AD0
Instruction
fetched
Instruction
executed
ALE
OE
WR
TABLRD
INST (PC+1)
INST (PC+2)
INST (PC-1)
TABLRD cycle1
TABLRD cycle2
INST (PC+1)
Data read cycle
PC
PC+1
TBL
Data in
PC+2
'1'
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
AD15:AD0
Instruction
fetched
Instruction
executed
TABLRD1
TABLRD2
INST (PC+2)
INST (PC+3)
INST (PC+2)
ALE
OE
WR
INST (PC-1)
TABLRD1 cycle1 TABLRD1 cycle2 TABLRD2 cycle1 TABLRD2 cycle2
Data read cycle
Data read cycle
'1'
PC
PC+1
PC+2
PC+3
TBL1 Data in 1
TBL2
Data in 2



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