PIC17C752-08SLASHCL datasheet(157/328 Pages) MICROCHIP

157 / 328 page

DS30289A-page 157

PIC17C7XX

15.2.11 I2C MASTER MODE TRANSMISSION

Transmission of a data byte, a 7-bit address, or either

half of a 10-bit address is accomplished by simply writ-

ing a value to SSPBUF register. This action will set

the buffer full ﬂag (BF) and allow the baud rate genera-

tor to begin counting and start the next transmission.

Each bit of address/data will be shifted out onto the

SDA pin after the falling edge of SCL is asserted (see

data hold time spec).

SCL is held low for one baud

rate generator roll over count (TBRG). Data should be

valid before SCL is released high (see Data setup time

spec). When the SCL pin is released high, it is held

that way for TBRG, the data on the SDA pin must

remain stable for that duration and some hold time

after the next falling edge of SCL. After the eighth bit

is shifted out (the falling edge of the eighth clock), the

BF ﬂag is cleared and the master releases SDA allow-

ing the slave device being addressed to respond with

an ACK bit during the ninth bit time, if an address

match occurs or if data was received properly.

The

status of ACK is read into the ACKDT on the falling

edge of the ninth clock.

If the master receives an

acknowledge, the acknowledge status bit (AKSTAT) is

cleared. If not, the bit is set. After the ninth clock the

SSPIF is set, and the master clock (baud rate genera-

tor) is suspended until the next data byte is loaded into

the SSPBUF leaving SCL low and SDA unchanged.

(Figure 15-29)

After the write to the SSPBUF, each bit of address will

be shifted out on the falling edge of SCL until all seven

address bits and the R/W bit are completed. On the fall-

ing edge of the eighth clock the master will de-assert

the SDA pin allowing the slave to respond with an

acknowledge. On the falling edge of the ninth clock the

master will sample the SDA pin to see if the address

was recognized by a slave. The status of the ACK bit is

loaded into the ACKSTAT status bit (SSPCON2<6>).

Following the falling edge of the ninth clock transmis-

sion of the address, the SSPIF is set, the BF ﬂag is

cleared, and the baud rate generator is turned off until

another write to the SSPBUF takes place, holding SCL

low and allowing SDA to ﬂoat.

15.2.11.1 BF STATUS FLAG

In transmit mode, the BF bit (SSPSTAT<0>) is set

when the CPU writes to SSPBUF and is cleared when

all 8 bits are shifted out.

15.2.11.2 WCOL STATUS FLAG

If the user writes the SSPBUF when a transmit is

already in progress (i.e. SSPSR is still shifting out a

data byte), then WCOL is set and the contents of the

buffer are unchanged (the write doesn’t occur).

WCOL must be cleared in software.

15.2.11.3 AKSTAT STATUS FLAG

In transmit mode, the AKSTAT bit (SSPCON2<6>) is

cleared when the slave has sent an acknowledge

(ACK = 0), and

is set when the slave does not

acknowledge (ACK = 1). A slave sends an acknowl-

edge when it has recognized its address (including a

general call), or when the slave has properly received

its data.

PIC17C752-08/CL Datasheet(PDF) 157 Page - Microchip Technology

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