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AR0230CSSC00SUEA0-DRBR Datasheet(PDF) 16 Page - ON Semiconductor |
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AR0230CSSC00SUEA0-DRBR Datasheet(HTML) 16 Page - ON Semiconductor |
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16 / 36 page ![]() AR0230CS/D Rev. 8, Pub. 11/15 EN 16 ©Semiconductor Components Industries, LLC, 2015. AR0230CS: 1/2.7-Inch 2.1 Mp/Full HD Digital Image Sensor Features Overview time in such a way that the stream of output frames from the AR0230CS switches cleanly from the old integration time to the new while only generating frames with uniform inte- gration. See “Changes to Integration Time” in the AR0230CS Register Reference. • Global reset mode. This mode can be used to acquire a single image at the current resolution. In this mode, the end point of the pixel integration time is controlled by an external electromechanical shutter, and the AR0230CS provides control signals to interface to that shutter. The benefit of using an external electromechanical shutter is that it eliminates the visual arti- facts associated with ERS operation. Visual artifacts arise in ERS operation, particularly at low frame rates, because an ERS image effectively integrates each row of the pixel array at a different point in time. Embedded Data and Statistics The AR0230CS has the capability to output image data and statistics embedded within the frame timing. There are two types of information embedded within the frame readout. •Embedded Data: If enabled, these are displayed on the two rows immediately before the first active pixel row is displayed. • Embedded Statistics: If enabled, these are displayed on the two rows immediately after the last active pixel row is displayed. Multi-Camera Synchronization The AR0230CS supports advanced line synchronization controls for multi-camera (stereo) support. Slave Mode The slave mode feature of the AR0230CS supports triggering the start of a frame readout from an input signal that is supplied from an external ASIC. The slave mode signal allows for precise control of frame rate and register change updates. Context Switching and Register Updates The user has the option of using the highly configurable context memory, or a simplified implementation in which only a subset of registers is available for switching. The AR0230 supports a highly configurable context switching RAM of size 256 x 16. Within this Context Memory, changes to any register may be stored. The register set for each context must be the same, but the number of contexts and registers per context are limited only by the size of the context memory. Alternatively, the user may switch between two predefined register sets A and B by writing to a context switch change bit. When the context switch is configured to context A the sensor will reference the context A registers. If the context switch is changed from A to B during the readout of frame n, the sensor will then reference the context B coarse_integration_time registers in frame n+1 and all other context B registers at the beginning of reading frame n+2. The sensor will show the same behavior when changing from context B to context A. The registers listed in Table 4 are context-switchable: |
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