AR0230CSSC00SUEA0-DRBR datasheet(31/36 Pages) ONSEMI

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AR0230CS/D Rev. 8, Pub. 11/15 EN

©Semiconductor Components Industries, LLC, 2015.

AR0230CS: 1/2.7-Inch 2.1 Mp/Full HD Digital Image Sensor

Power-On Reset and Standby Timing

Power-Up Sequence

The recommended power-up sequence for the AR0230CS is shown in Figure 11. The

available power supplies (VDD_IO, VDD, VDD_SLVS, VDD_PLL, VAA, VAA_PIX) must have

the separation specified below.

1. Turn on VDD_PLL power supply.

2. After 100s, turn on VAA and VAA_PIX power supply.

3. After 100s, turn on VDD_IO power supply.

4. After 100s, turn on VDD power supply.

5. After 100s, turn on VDD_SLVS power supply.

6. After the last power supply is stable, enable EXTCLK.

7. Assert RESET_BAR for at least 1ms. The parallel interface will be tri-stated during this

time.

8. Wait 150000 EXTCLKs (for internal initialization into software standby.

9. Configure PLL, output, and image settings to desired values.

10. Wait 1ms for the PLL to lock.

11. Set streaming mode (R0x301a[2] = 1).

Figure 11:

Power Up

VDD_PLL (2.8)

VAA_PIX

VAA (2.8)

VDD_IO (1.8/2.8)

VDD (1.8)

VDD_SLVS (0.4)

EXTCLK

RESET_BAR

Hard Reset

Internal

Initialization

Software

Standby

PLL Lock

Streaming

AR0230CSSC00SUEA0-DRBR Datasheet(PDF) 31 Page - ON Semiconductor