PIC16LF72SLASHP datasheet(42/136 Pages) MICROCHIP

42 / 136 page

PIC16F72

DS39597B-page 40

 2002 Microchip Technology Inc.

TABLE 8-2:

REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, AND TIMER1

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Value on

all other

RESETS

0Bh,8Bh

10Bh,18Bh

INTCON

GIE

PEIE

TMR0IE

INTE

RBIE

TMR0IF

INTF

RBIF

0000 000x 0000 000u

0Ch

PIR1

—

ADIF

—

SSPIF

CCP1IF

TMR2IF

TMR1IF -0-- 0000 0000 0000

8Ch

PIE1

—

ADIE

—

SSPIE

CCP1IE

TMR2IE

TMR1IE -0-- 0000 0000 0000

87h

TRISC

PORTC Data Direction Register

1111 1111 1111 1111

0Eh

TMR1L

Holding Register for the Least Significant Byte of the 16-bit TMR1 Register

xxxx xxxx uuuu uuuu

0Fh

TMR1H

Holding Register for the Most Significant Byte of the 16-bit TMR1 Register

xxxx xxxx uuuu uuuu

10h

T1CON

—

T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu

15h

CCPR1L

Capture/Compare/PWM Register1 (LSB)

xxxx xxxx uuuu uuuu

16h

CCPR1H

Capture/Compare/PWM Register1 (MSB)

xxxx xxxx uuuu uuuu

17h

CCP1CON

—

CCP1X

CCP1Y

CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000

Legend:

= unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by Capture and Timer1.

PIC16LF72/P Datasheet(PDF) 42 Page - Microchip Technology

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