21

Rev.1.0

28 -

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8.1. Power-ON Timing

Symbol

Parameter

Min

Max

Unit

tVSL

VCC(min) To CS# Low

10

us

tPUW

Time Delay From VCC(min) To Write Instruction

1

10

ms

VWI

Write Inhibit Voltage VCC(min)

1

2.5

V

Table 3. Power-Up Timing and Write Inhibit Threshold

8. ELECTRICAL CHARACTERISTICS

8.2. Initial Delivery State

The device is delivered with the memory array erased: all bits are set to 1(each byte contains FFH). The Status

Register contains 00H (all Status Register bits are 0).

8.3. Data Retention and Endurance

Parameter

Test Condition

Min

Unit

Minimum Pattern Data Retention Time

150°C

10

Years

125°C

20

Years

Erase / Program Endurance

-40 to 85°C

100K

Cycles

8.4. Latch Up Characteristics

Parameter

Min

Max

Input Voltage Respect To VSS On I/O Pins

-1.0V

VCC+1.0V

VCC Current

-100mA

100mA