GD25Q21 datasheet(38/49 Pages) ELM

38 / 49 page

Rev.1.1

49 -

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GD25Q21BxIGx Uniform Sector Dual and Quad Serial Flash

7.30. Read Security Registers (48H)

The Read Security Registers command is similar to Fast Read command. The command is followed by a

3-byte address (A23-A0) and a dummy byte, each bit being latched-in during the rising edge of SCLK. Then

the memory content, at that address, is shifted out on SO, each bit being shifted out, at a Max frequency fC,

during the falling edge of SCLK. The first byte addressed can be at any location. The address is automatically

incremented to the next higher address after each byte of data is shifted out. Once the A8-A0 address reaches the

last byte of the register (Byte 1FFH), it will reset to 000H, the command is completed by driving CS# high.

Address

A23-16

A15-12

A11-9

A8-0

Security Register #1

00H

0 0 0 1

0 0 0

Byte Address

Security Register #2

00H

0 0 1 0

0 0 0

Byte Address

Security Register #3

00H

0 0 1 1

0 0 0

Byte Address

Figure 35. Read Security Registers command Sequence Diagram

Command

0 1 2 3 4 5 6 7

48H

CS#

SCLK

High-Z

8 9 10

28 29 30 31

3 2 1 0

23 22 21

24-bit address

MSB

34 35 36 37

6 5 4 3 2 1 0

38 39

Data Out1

42 43 44 45

46 47

6 5 4 3 2 1 0

6 5

Data Out2

CS#

SCLK

MSB

Dummy Byte

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