Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

LAN8810 Datasheet(PDF) 9 Page - Microchip Technology

Part # LAN8810
Description  GMII 10/100/1000 Ethernet Transceiver
PDF  83 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8810 Datasheet(HTML) 9 Page - Microchip Technology

Back Button LAN8810 Datasheet HTML 5Page - Microchip Technology LAN8810 Datasheet HTML 6Page - Microchip Technology LAN8810 Datasheet HTML 7Page - Microchip Technology LAN8810 Datasheet HTML 8Page - Microchip Technology LAN8810 Datasheet HTML 9Page - Microchip Technology LAN8810 Datasheet HTML 10Page - Microchip Technology LAN8810 Datasheet HTML 11Page - Microchip Technology LAN8810 Datasheet HTML 12Page - Microchip Technology LAN8810 Datasheet HTML 13Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 83 page
background image
 2009-2015 Microchip Technology Inc.
DS00001870B-page 9
LAN8810/LAN8810I
TABLE 2-4:
ETHERNET PINS
Num Pins
Name
Symbol
Buffer
Type
Description
1
Ethernet TX/
RX Positive
Channel 0
TR0P
AIO
Transmit/Receive Positive Channel 0.
1
Ethernet TX/
RX Negative
Channel 0
TR0N
AIO
Transmit/Receive Negative Channel 0.
1
Ethernet TX/
RX Positive
Channel 1
TR1P
AIO
Transmit/Receive Positive Channel 1.
1
Ethernet TX/
RX Negative
Channel 1
TR1N
AIO
Transmit/Receive Negative Channel 1.
1
Ethernet TX/
RX Positive
Channel 2
TR2P
AIO
Transmit/Receive Positive Channel 2.
1
Ethernet TX/
RX Negative
Channel 2
TR2N
AIO
Transmit/Receive Negative Channel 2.
1
Ethernet TX/
RX Positive
Channel 3
TR3P
AIO
Transmit/Receive Positive Channel 3.
1
Ethernet TX/
RX Negative
Channel 3
TR3N
AIO
Transmit/Receive Negative Channel 3.
1
External PHY
Bias Resistor
ETHRBIAS
AI
Used for the internal bias circuits. Connect to an
external 8.06K 1.0% resistor to ground.
TABLE 2-5:
JTAG PINS
Num Pins
Name
Symbol
Buffer
Type
Description
1
JTAG Test
Data Out
TDO
VO8
JTAG (IEEE 1149.1) data output.
1
JTAG Test
Data Input
TDI
VIS
(PU)
JTAG (IEEE 1149.1) data input.
Note:
When not used, tie this pin to
VDDVARIO.
1
JTAG Test
Clock
TCK
VIS
(PD)
JTAG (IEEE 1149.1) test clock.
Note:
When not used, tie this pin to VSS.
1
JTAG Test
Mode Select
TMS
VIS
(PU)
JTAG (IEEE 1149.1) test mode select.
Note:
When not used, tie this pin to
VDDVARIO.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com