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LAN8820I Datasheet(PDF) 78 Page - Microchip Technology |
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LAN8820I Datasheet(HTML) 78 Page - Microchip Technology |
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78 / 83 page ![]() LAN8820/LAN8820I DS00001871B-page 78 2009-2015 Microchip Technology Inc. APPENDIX A: DATA SHEET REVISION HISTORY TABLE 6-2: REVISION HISTORY Revision Level & Date Section/Figure/Entry Correction DS00001871B (10-13-15) Trademark and Sales office listings updated. All: (Cover, Figure 2-1, Table 2-3, Table 2-6, Table 2-8, Table 3-4, Section 4.3.2, Section 5.6) Removed references to 125MHz single-ended clock support and the REF_SEL configuration strap. Table 2-3 Updated CONFIG3 pin description to correct list of connection pins. Section 4.2.10 Updated bit 11 description (active only when Manual Config. Enable is 1). Section 4.2.16 • Added note to MOD bits: “The MOD bits should not be modified and must be preserved when writing to this register.” • Updated bits 8:3 description to indicate they must be written with specific values. Section 5.6 Updated second sentence to “If the single-ended clock oscillator method is implemented, XO should be left unconnected and XI should be driven with a nominal 0V-VDD25IO clock signal.” DS00001871A (12-09-14) Section 3.6.1, "Hardware Reset (nRESET)," on page 22 Updated section with additional details on power- up sequencing requirements. Section 5.5.3, "Power-On Hardware Reset Timing," on page 67 Updated section with additional details on power- up sequencing requirements. Section title and included figures/tables updated. Rev. 1.1 (06-03-13) Section 4.2.4, "PHY Identifier 2 Register," on page 38 Corrected bits 9:4 default values from 0Ch to 0Eh Table 2-3, “LED & Configuration Pins,” on page 7, Table 3-4, “Configuration Straps,” on page 24, Note 4-8 on page 49, FIGURE 3-3: RGMII Modes of Operation on page 19 Updated RGMII_ID_MODE description to correct polarity: 1=delay enabled, 0=delay disabled. Section 5.3, "Power Consumption," on page 61 Updated power consumption numbers Table 2-3, “LED & Configuration Pins,” on page 7, Table 2-6, “Miscellaneous Pins,” on page 9, Table 3-4, “Configuration Straps,” on page 24, Section 5.6, "Clock Circuit," on page 75 Updated XI and REFCLK_SEL definitions/info for clarity. |
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