ACT8941A datasheet(27/42 Pages) ACTIVE-SEMI

27 / 42 page

ACT8941A

Rev 0, 12-Mar-13

- 27 -

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Control Signals

Enable Inputs

The ACT8941A features a variety of control inputs,

which are used to enable and disable outputs

depending upon the desired mode of operation.

PWRHLD is a logic input, while nPBIN is a unique,

multi-function input.

nPBIN Multi-Function Input

ACT8941A features the nPBIN multi-function pin,

which combines system enable/disable control with

a hardware reset function. Select either of the two

pin functions by asserting this pin, either through a

direct connection to GA, or through a 50kΩ resistor

to GA, as shown in Figure 2.

Figure 2:

nPBIN Input

Warm/Cold Manual Reset Function

The second major function of the nPBIN input is to

provide warm and cold manual reset function. To

manually reset the processor, drive nPBIN directly

to GA through a low impedance (less than 2.5kΩ).

An internal timer detects the duration of the manual

reset event.

Short Press/Warm Reset

When the manual reset button is pressed for less

than 130ms, ACT8941A commences a warm reset

operation where nRSTO immediately asserts low,

then remains asserted low until the manual reset

button is released for 130ms.

Long Press / Cold Reset (Power Cycle)

When the manual reset button is pressed for more

than 130ms, ACT8941A commences a power cycle

routine in which case all regulators are turned off

and then turned back on after reset button is

released with all the registers reloaded to default

values. When the ACT8941A turns on again, it

stays enabled for 260ms, the PWRHLD need to be

asserted during this time so that the system

remains

powered,

otherwise

the

ACT8941A

automatically shuts down.

nPBSTAT Output

nPBSTAT is an open-drain output that reflects the

state of the nPBIN input; nPBSTAT is asserted low

whenever nPBIN is asserted, and is high-Z

otherwise. This output is typically used as an

interrupt signal to the processor, to initiate a

software-programmable routine such as operating

mode selection or to open a menu. Connect

nPBSTAT to an appropriate supply voltage

(typically OUT1) through a 10kΩ or greater resistor.

nRSTO Output

nRSTO is an open-drain output which asserts low

upon startup or when manual reset is asserted via

the nPBIN input. When asserted on startup, nRSTO

remains low until reset time-out period expires after

OUT1 reaches its power-OK threshold. When

asserted due to manual-reset, nRSTO immediately

asserts low, then remains asserted low until the

nPBIN input is de-asserted and the reset time-out

period expires.

Connect a 10kΩ or greater pull-up resistor from

nRSTO to an appropriate voltage supply (typically

OUT1).

nIRQ Output

nIRQ is an open-drain output that asserts low any

time an interrupt is generated. Connect a 10kΩ or

greater pull-up resistor from nIRQ to an appropriate

voltage supply. nIRQ is typically used to drive the

interrupt input of the system processor.

Many of the ACT8941A's functions support

interrupt-generation

result

various

conditions. These are typically masked by default,

but may be unmasked via the I2C interface. For

information

about

the

available

fault

conditions, refer to the appropriate sections of this

datasheet.

Note that under some conditions a false interrupt

may be generated upon initial startup. For this

reason, it is recommended that the interrupt service

routine check and validate nSYSLEVMSK[-] and

nFLTMSK[-] bits before processing an interrupt

generated by these bits. These interrupts may be

validated by nSYSSTAT[-], OK[-] bits.

Push-Button Control

The ACT8941A is designed to initiate a system

enable sequence when the nPBIN multi-function

input is asserted. Once this occurs, a power-on

sequence commences, as described below. The

power-on sequence must complete and the

microprocessor must take control (by asserting

SYSTEM CONTROL INFORMATION

ACT8941A

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