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AD8284WCSVZ Datasheet(PDF) 18 Page - Analog Devices |
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AD8284WCSVZ Datasheet(HTML) 18 Page - Analog Devices |
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18 / 28 page ![]() AD8284 Data Sheet Rev. D | Page 18 of 28 SERIAL PORT INTERFACE (SPI) The AD8284 serial port interface allows the user to configure the signal chain for specific functions or operations through a structured register space provided inside the chip. The SPI offers the user added flexibility and customization depending on the application. Addresses are accessed via the serial port and can be written to or read from via the port. Memory is organized into bytes that can be further divided into fields, as documented in the Memory Map section. Detailed operational information can be found in the AN-877 Application Note, Interfacing to High Speed ADCs via SPI. Four pins define the serial port interface, or SPI: the SCLK, SDI, SDO, and CS pins. The serial clock pin (SCLK) synchronizes the read and write data presented to the device. The serial data input and output pins, SDI and SDO, allow data to be sent to and read from the internal memory map registers of the device. The chip select pin (CS) is an active low control that enables or disables the read and write cycles (see Table 8). Table 8. Serial Port Interface Pins Pin Function SCLK Serial clock. The serial shift clock input. SCLK is used to synchronize serial interface reads and writes. SDI Serial data input. SDO Serial data output. CS Chip select (active low). This control gates the read and write cycles. The falling edge of CS, in conjunction with the rising edge of SCLK, determines the start of the framing sequence. During an instruction phase, a 16-bit instruction is transmitted, followed by one or more data bytes, which is determined by Bit Field W0 and Bit Field W1. See Figure 22 and Table 9 for an example of the serial timing and its definitions. In normal operation, CS signals to the device that SPI commands are about to be received and processed. When CS is brought low, the device processes SCLK and SDI to process instructions. Normally, CS remains low until the communication cycle is complete. However, if the AD8284 is connected to a slow device, CS can be brought high between bytes, allowing older microcontrollers enough time to transfer data into the shift registers. CS can be stalled when transferring one, two, or three bytes of data. When W0 and W1 are set to 11, the device enters streaming mode and continues to process data, either reading or writing, until CS is taken high to end the communication cycle. This allows complete memory transfers without the need to provide additional instructions. Regardless of the mode, if CS is taken high in the middle of any byte transfer, the SPI state machine is reset and the device waits for a new instruction. In addition to the operation modes, the SPI port can be configured to operate in different manners. For applications that do not require a control port, the CS line can be tied and held high. This places the remainder of the SPI pins in their secondary mode as defined in the AN-877 Application Note, Interfacing to High Speed ADCs via SPI. CS can also be tied low to enable 3-wire mode. When CS is tied low, SCLK, SDO, and SDI are the only pins required for communication. Although the device is synchronized during power-up, caution must be exercised when using this mode to ensure that the serial port remains synchronized with the CS line. When operating in 3-wire mode, it is recommended that a 1-, 2-, or 3-byte transfer be used exclusively. Without an active CS line, streaming mode can be entered but not exited. Data can be sent in MSB-first or LSB-first mode. MSB-first mode is the default at power-up and can be changed by adjusting the configuration register. For more information about this and other features, see the AN-877 Application Note, Interfacing to High Speed ADCs via SPI. HARDWARE INTERFACE The pins described in Table 8 constitute the physical interface between the user’s programming device and the serial port of the AD8284. The SCLK, SDI, and CS pins function as inputs when using the SPI interface. The SDO pin is an output during readback. This interface is flexible enough to be controlled by either serial- programmable read-only memory (PROM) or PIC micro- controllers. This provides the user with alternative means, other than a full SPI controller, for programming the device (see the AN-812 Application Note). |
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