5

PI3WVR31313A

DP/HDMI 1:3 De-multiplexer switches

www.pericom.com

12/03/15

All trademarks are property of their respective owners.

Pin mapping for dual mode DP source DEMUX to DP output

DP mode

HDMI/DVI mode

WVR31313A

input pins

WVR31313A

port1 output

WVR31313A

port2 output

WVR31313A

port3 output

ML_lane0(P)

TX2+

D0P

D0P1

D0P2

D2P3

ML_lane0(N)

TX2-

D0N

D0N1

D0N2

D2N3

ML_lane1(P)

TX1+

D1P

D1P1

D1P2

D1P3

ML_lane1(N)

TX1-

D1N

D1N1

D1N2

D1N3

ML_lane2(P)

TX0+

D2P

D2P1

D2P2

D0P3

ML_lane2(N)

TX0-

D2N

D2N1

D2N2

D0N3

ML_lane3(P)

TXC+

D3P

D3P1

D3P2

CLKP3

ML_lane3(N)

TXC-

D3N

D3N1

D3N2

CLKN3

Function Description

The MS pin selects I2C or pin control mode.

Pin control mode has only automatic port selection. I2C control mode has automatic port selection.

In auto port selection, when only one HPD high detected, the port with HPD high will be selected. When multiple HPD high

detected, the PRI_SEL pin(priority select) will determine the priority of the 3 ports.

When PRI_SEL=low, the port-priority will be port1-port2-port3 from high to low; when PRI_SEL=high, the port priority will be

port1-port3-port2 from high to low; when PRI_SEL=M (open as not connected), the port priority will be port3-port1-port2 from

high to low.

When port 1 (or port2) is selected and CAB_1 (or CAB_2) is low as in DP mode, the AUX/DDC channels will work as AUX

channels. AUXP shall have 100Kohm external resistor to GND and AUXN shall have 100Kohm external resistor to VDD. The data

rate of AUX channels will be >720Mbps.The internal DDC switch will be off.

When port 1 (or port2) is selected and CAB_1 (or CAB_2) is high when DP to HDMI adapter plugged, the AUX/DDC channels will

work as DDC channels. The internal DDC channels are on and the AUX channels are off. The input of DDC channels can tolerate

5V input and voltage of DDC to source will be limited about 3.3V or below.

When port 1 or port 2 is selected (passive ports), port3 with HDMI re-driver will shut down.

When port 3 is selected, the internal DP to HDMI level shifter will be enabled. There will be 3 EQ and 3 Pre-emphasis settings in

pin control mode, 8 EQ and 5 Pre-emphasis settings in I2C control mode.

When port 3 is selected, HDMI output can be standard TMDS-open-drain source, as well to be selected with internal source

termination as 50 ohm pull up to 3.3V VDD, using ROUT_SEL pin control or I2C control.

When port 3 is active as DP to HDMP level shifter, the DDC channel can be selected between bi-direction DDC buffer and passive

DDC switch.

HPD1, HPD2 and HPD3 are with internal CMOS buffers and can support 3.3V and 5V HPD inputs.

Squelch Mode

Squelch function will disable HDMI data output (as high impedance)when the voltage and frequency of input clock (TMDS) are

below squelch threshold, which will prevent random noise presenting in HDMI data output, thereby prevent noise on sink display.

Squelch function will enable-resume HDMI data output when input clock signals are above squelch threshold.

15-0162