TAS3103DBT datasheet(87/146 Pages) TI

87 / 146 page

3−27

Delay

Channel 1

Delay

Channel 2

Delay Channel 3 (PCH3 = 0)

Reserved

Reverb

Channel 1

Reserved

Reverb

Channel 2 (PR2 = 0)

Reverb

Channel 3

2(PCH1 + PCH2 + 4) + 3(PR1 + PR3 + 3)

Start

2(PCH1 + PCH2 + 4) + 3(PR1 + PR3 + 4) − 1

Stop

Start

2(PCH1 + 1) − 1

Stop

Delay Memory Allocation − CH1

(CH 1 Delay Assignment = PCH1)

2(PCH1 + 1)

Start

2(PCH1 + PCH2 + 2) − 1

Stop

Delay Memory Allocation − CH2

(CH 2 Delay Assignment = PCH2)

2(PCH1 + PCH2 + 2)

Start

2(PCH1 + PCH2 + 2) + 1

Stop

Delay Memory Allocation − CH3

(CH 3 Delay Assignment = PCH3 = 0)

2(PCH1 + PCH2 + 3)

Start

2(PCH1 + PCH2 + 3) + 1

Stop

Delay Memory Allocation − Reserved

(Reserved Delay Assignment = 0)

2(PCH1 + PCH2 + 4)

Start

Stop

Reverb Delay Memory Allocation − CH1

(CH 1 Reverb Delay Assignment = PR1)

Start

Stop

2(PCH1 + PCH2 + 4) + 3(PR1 + 1) − 1

2(PCH1 + PCH2 + 4) + 3(PR1 + 1)

2(PCH1 + PCH2 + 4) + 3(PR1 + 1) + 2

Reverb Delay Memory Allocation − CH2

(CH 2 Reverb Delay Assignment = PR2 = 0)

Reverb Delay Memory Allocation − Reserved

(Reserved Reverb Delay Assignment = 0)

Start

Stop

Reverb Delay Memory Allocation − CH3

(CH 3 Reverb Delay Assignment = PR3)

2(PCH1 + PCH2 + 4) + 3(PR1 + PR3 + 3) − 1

2(PCH1 + PCH2 + 4) + 3(PR1 + 2)

Figure 3−17. Delay Line Memory Implementation

TAS3103DBT Datasheet(PDF) 87 Page - Texas Instruments

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