COP888EB datasheet(48/75 Pages) NSC

Part #	COP888EB

Description	8-Bit CMOS ROM Based Microcontrollers with 8k Memory, CAN Interface, 8-Bit A/D, and USART

PDF	75 Pages

Scroll/Zoom	100%

Manufacturer	NSC [National Semiconductor (TI)]

Direct Link	http://www.national.com

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48 / 75 page

Serial Peripheral Interface (Continued)

The SPIU Control Register

TABLE 13. SPI Control (SPICNTL) (0098)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SRIE

STIE

SESSEN

SPIMOD[1:0]

SCE

SPIEN

SLOOP

00000

SRIE

SPI Receive Interrupt Enable

0 — disable receive interrupt

0 — enable receive interrupt

STIE

SPI Transmit buffer Interrupt Enable

0 — disable transmit buffer interrupt

0 — enable transmit buffer interrupt

SESSEN

SPI SS Expander (ESS) enable

0 — The detection of the ESS programming mode is disabled, i.e., the value of MOSI at the falling

edge of SS is “don’t care”.

1 — ESS programming mode detection is enabled, i.e., if the condition “MOSI=0atthe falling edge

of SS” occurs, the SS-Expander is selected and bits [7:0] of the first transmitted byte determine the

state of the N-port (ESS[7:0]). ESS[7:0] will go 1 at the positive edge of SS.

DS012837-40

FIGURE 38. SPI Block Diagram

COP888EB Datasheet(PDF) 48 Page - National Semiconductor (TI)