TDA8922TH datasheet(10/36 Pages) PHILIPS

10 / 36 page

2003 Mar 20

Philips Semiconductors

Objective speciﬁcation

× 25 W class-D power ampliﬁer

TDA8922

8.3.4

SUPPLY VOLTAGE ALARM

If the supply voltage drops below

±12.5 V, the

undervoltage protection circuit is activated and the system

will shut down correctly. If the internal clock is used, this

switch-off will be silent and without plop noise. When the

supply voltage rises above the threshold level, the system

is restarted again after 100 ms. If the supply voltage

exceeds

±32 V the overvoltage protection circuit is

activated and the power stages will shut down. They are

re-enabled as soon as the supply voltage drops below the

threshold level.

An additional balance protection circuit compares the

positive (VDD) and the negative (VSS) supply voltages and

is triggered if the voltage difference between them

exceeds a certain level. This level depends on the sum of

both supply voltages. An expression for the unbalanced

threshold level is as follows: Vth(unb) ≈ 0.15 × (VDD +VSS).

Example: With a symmetrical supply of

±30 V, the

protection circuit will be triggered if the unbalance exceeds

approximately 9 V; see Section 16.7.

8.4

Differential audio inputs

For a high common mode rejection ratio and a maximum

of flexibility in the application, the audio inputs are fully

differential. By connecting the inputs anti-parallel the

phase of one of the channels can be inverted, so that a

load can be connected between the two output filters.

In this case the system operates as a mono BTL amplifier

and with the same loudspeaker impedance an

approximately four times higher output power can be

obtained.

The input configuration for a mono BTL application is

illustrated in Fig.6; for more information see Chapter 16.

In the stereo single-ended configuration it is also

recommended to connect the two differential inputs in

anti-phase. This has advantages for the current handling

of the power supply at low signal frequencies.

handbook, full pagewidth

Vin

IN1

OUT1

power stage

MBL466

OUT2

SGND

IN1

−

IN2

−

Fig.6 Input configuration for mono BTL application.

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