CC1100-RTR1 datasheet(47/100 Pages) TI1

47 / 100 page

CC1100

SWRS038D

Page 47 of 92

3. Repeat steps 1 and 2 until n = # of bytes

remaining in packet.

4. Read the remaining bytes from the RX

FIFO.

The 4-bit FIFOTHR.FIFO_THR setting is used

to program threshold points in the FIFOs.

Table 29 lists the 16 FIFO_THR settings and

the corresponding thresholds for the RX and

TX FIFOs. The threshold value is coded in

opposite directions for the RX FIFO and TX

FIFO. This gives equal margin to the overflow

and underflow conditions when the threshold

is reached.

A signal will assert when the number of bytes

in the FIFO is equal to or higher than the

programmed threshold. This signal can be

viewed on the GDO pins (see Table 34 on

page 56).

Figure 21 shows the number of bytes in both

the RX FIFO and TX FIFO when the threshold

signal toggles, in the case of FIFO_THR=13.

Figure 20 shows the signal as the respective

FIFO is filled above the threshold, and then

drained below.

53 54 55 56

NUM_RXBYTES

GDO

NUM_TXBYTES

GDO

Figure 20: FIFO_THR=13 vs. Number of

Bytes in FIFO (GDOx_CFG=0x00 in RX and

GDOx_CFG=0x02

in TX)

FIFO_THR

Bytes in TX FIFO

Bytes in RX FIFO

0 (0000)

1 (0001)

2 (0010)

3 (0011)

4 (0100)

5 (0101)

6 (0110)

7 (0111)

8 (1000)

9 (1001)

10 (1010)

11 (1011)

12 (1100)

13 (1101)

14 (1110)

15 (1111)

Table 29: FIFO_THR Settings and the

Corresponding FIFO Thresholds

56 bytes

8 bytes

Overflow

margin

Underflow

margin

FIFO_THR=13

RXFIFO

TXFIFO

Figure 21: Example of FIFOs at Threshold

CC1100-RTR1 Datasheet(PDF) 47 Page - Texas Instruments

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