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DP83849IFVS/NOPB Datasheet(PDF) 59 Page - Texas Instruments |
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DP83849IFVS/NOPB Datasheet(HTML) 59 Page - Texas Instruments |
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59 / 105 page  4B/5B DECODER DESCRAMBLER RX_CLK RXD[3:0] / RX_ER CODE GROUP ALIGNMENT SERIAL TO PARALLEL RX_DV/CRS RD +/- DIGITAL SIGNAL PROCESSOR ANALOG FRONT END SIGNAL DETECT MLT-3 TO BINARY DECODER NRZI TO NRZ DECODER LINK INTEGRITY MONITOR RX_DATA VALID SSD DETECT DP83849IF www.ti.com SNOSAX8D – JUNE 2009 – REVISED APRIL 2013 8 Design Guidelines 8.1 TPI NETWORK CIRCUIT Figure 8-1 shows the recommended circuit for a 10/100 Mb/s twisted pair interface. Below is a partial list of recommended transformers. It is important that the user realize that variations with PCB and component characteristics requires that the application be tested to ensure that the circuit meets the requirements of the intended application. Pulse H1102 Pulse H2019 Belfuse S558-5999-U7 Halo TG110-S050N2RL Figure 8-1. 10/100 Mb/s Twisted Pair Interface Copyright © 2009–2013, Texas Instruments Incorporated Design Guidelines 59 Submit Documentation Feedback Product Folder Links: DP83849IF |
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