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DP83849IFVS/NOPB Datasheet(PDF) 75 Page - Texas Instruments |
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DP83849IFVS/NOPB Datasheet(HTML) 75 Page - Texas Instruments |
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75 / 105 page  DP83849IF www.ti.com SNOSAX8D – JUNE 2009 – REVISED APRIL 2013 10.1.2 Basic Mode Status Register (BMSR) Table 10-4. Basic Mode Status Register (BMSR), address 01h Bit Bit Name Default Description 15 100BASE-T4 0, RO/P 100BASE-T4 Capable: 0 = Device not able to perform 100BASE-T4 mode. 14 100BASE-TX 1, RO/P 100BASE-TX Full Duplex Capable: FULL DUPLEX 1 = Device able to perform 100BASE-TX in full duplex mode. 13 100BASE-TX 1, RO/P 100BASE-TX Half Duplex Capable: HALF DUPLEX 1 = Device able to perform 100BASE-TX in half duplex mode. 12 10BASE-T 1, RO/P 10BASE-T Full Duplex Capable: FULL DUPLEX 1 = Device able to perform 10BASE-T in full duplex mode. 11 10BASE-T 1, RO/P 10BASE-T Half Duplex Capable: HALF DUPLEX 1 = Device able to perform 10BASE-T in half duplex mode. 10:7 RESERVED 0, RO RESERVED: Write as 0, read as 0. 6 MF PREAMBLE 1, RO/P Preamble suppression Capable: SUPPRESSION 1 = Device able to perform management transaction with preamble suppressed, 32-bits of preamble needed only once after reset, invalid opcode or invalid turnaround. 0 = Normal management operation. 5 AUTO-NEGOTIATION 0, RO Auto-Negotiation Complete: COMPLETE 1 = Auto-Negotiation process complete. 0 = Auto-Negotiation process not complete. 4 REMOTE FAULT 0, RO/LH Remote Fault: 1 = Remote Fault condition detected (cleared on read or by reset). Fault criteria: Far End Fault Indication or notification from Link Partner of Remote Fault. 0 = No remote fault condition detected. 3 AUTO-NEGOTIATION 1, RO/P Auto Negotiation Ability: ABILITY 1 = Device is able to perform Auto-Negotiation. 0 = Device is not able to perform Auto-Negotiation. 2 LINK STATUS 0, RO/LL Link Status: 1 = Valid link established (for either 10 or 100 Mb/s operation). 0 = Link not established. The criteria for link validity is implementation specific. The occurrence of a link failure condition will causes the Link Status bit to clear. Once cleared, this bit may only be set by establishing a good link condition and a read via the management interface. 1 JABBER DETECT 0, RO/LH Jabber Detect: This bit only has meaning in 10 Mb/s mode. 1 = Jabber condition detected. 0 = No Jabber. This bit is implemented with a latching function, such that the occurrence of a jabber condition causes it to set until it is cleared by a read to this register by the management interface or by a reset. 0 EXTENDED CAPABILITY 1, RO/P Extended Capability: 1 = Extended register capabilities. 0 = Basic register set capabilities only. Copyright © 2009–2013, Texas Instruments Incorporated Register Block 75 Submit Documentation Feedback Product Folder Links: DP83849IF |
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