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SCANSTA111MT/NOPB Datasheet(PDF) 12 Page - Texas Instruments

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Part # SCANSTA111MT/NOPB
Description  SCANSTA111 Enhanced SCAN Bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
PDF  38 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SCANSTA111MT/NOPB Datasheet(HTML) 12 Page - Texas Instruments

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SCANSTA111
SNLS060K – AUGUST 2001 – REVISED APRIL 2013
www.ti.com
LEVEL 2 PROTOCOL
Once the SCANSTA111 has been successfully addressed and selected, its internal registers may be accessed
via Level-2 Protocol. Level-2 Protocol is compliant to IEEE Std. 1149.1 TAP protocol with one exception: if the
'STA111 is selected via the Broadcast or Multi-Cast address, TDOB is always TRI-STATED. (The TDOB buffer
must be implemented this way to prevent bus contention.) Upon being selected, (i.e., the 'STA111 Selection
controller transitions from the Wait-For-Address state to one of the Selected states), each of the local scan ports
(LSP0 , LSP1 , LSP2) remains parked in one of the following four TAP Controller states: Test-Logic-Reset, Run-
Test/Idle, Pause-DR, or Pause-IR and the active scan chain consists of: TDIB through the instruction register (or
the IDCODE register) and out through TDOB.
TDIB → Instruction Register → TDOB
The UNPARK instruction (described later) is used to insert one or more local scan ports into the active scan
chain. Table 6 describes which local ports are inserted into the chain, and in what order.
LEVEL 2 INSTRUCTION TYPES There are two types of instructions (reference Table 4):
1. Instructions that insert a 'STA111 register into the active scan chain so that the register can be captured or
updated
(BYPASS,
SAMPLE/PRELOAD,
EXTEST,
ID-CODE,
MODESEL,
MCGRSEL,
LFSR-SEL,
CNTRSEL).
2. Instructions that configure local ports or control the operation of the linear feedback shift register and counter
registers (UNPARK, PARKTRL, PARKRTI, PARK-PAUSE, GOTOWAIT, SOFTRESET, LFSRON, LFSROFF,
CNTRON, CNTROFF). These instructions, along with any other yet undefined Op-Codes, will cause the
device identification register to be inserted into the active scan chain.
Table 4. Level 2 Protocol and Op-Codes
Instructions
Hex Op-Code
Binary Op-Code
Data Register
BYPASS
FF
1111 1111
Bypass Register
EXTEST
00
0000 0000
Boundary-Scan Register
SAMPLE/PRELOAD
81
1000 0001
Boundary-Scan Register
IDCODE
AA
1010 1010
Device Identification Register
UNPARK
E7
1110 0111
Device Identification Register
PARKTLR
C5
1100 0101
Device Identification Register
PARKRTI
84
1000 0100
Device Identification Register
PARKPAUSE
C6
1100 0110
Device Identification Register
GOTOWAIT (1)
C3
1100 0011
Device Identification Register
MODESEL
8E
1000 1110
Mode Register0
MODESEL1
82
1000 0010
Mode Register1
MODESEL2
83
1000 0011
Mode Register2
MODESEL3
85
1000 0101
Mode Register3
MCGRSEL
03
0000 0011
Multi-Cast Group Register
SOFTRESET
88
1000 1000
Device Identification Register
LFSRSEL
C9
1100 1001
Linear Feedback Shift Register
LFSRON
0C
0000 1100
Device Identification Register
LFSROFF
8D
1000 1101
Device Identification Register
CNTRSEL
CE
1100 1110
32-Bit TCK Counter Register
CNTRON
0F
0000 1111
Device Identification Register
CNTROFF
90
1001 0000
Device Identification Register
DEFAULT_BYPASS (2)
07
0000 0111
Set Bypass_reg as default data register
TRANSPARENT0
A0
1010 0000
Transparent Enable Register0
TRANSPARENT1
A1
1010 0001
Transparent Enable Register1
TRANSPARENT2
A2
1010 0010
Transparent Enable Register2
TRANSPARENT3
A3
1010 0011
Transparent Enable Register3
(1)
All other instructions act on selected 'STA111s only.
(2)
Commands added to HDL version of 'STA111.
12
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Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: SCANSTA111



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