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SN75DP119RHHT Datasheet(PDF) 3 Page - Texas Instruments |
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SN75DP119RHHT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 28 page ![]() 14 1 9 13 12 11 10 8 7 6 2 3 4 5 GNDpad 1 2 3 4 5 6 7 8 11 10 12 13 14 15 16 17 35 36 34 33 32 31 30 29 26 27 24 23 22 21 20 25 9 18 19 28 thermalPad. connectthis padtoGND. DP119 RGY package (TopView) DP119 RHHpackage (TopView) VOD_CTL PRE_CTL EQ_CTL EN NC NC NC NC NC NC NC NC NC NC NC NC NC VOD_CTL PRECTL GND EQ_CTL EN SN75DP119 www.ti.com SLLSE12A – NOVEMBER 2009 – REVISED JULY 2014 6 Pin Configuration and Functions Pin Functions, RGY Package PIN DESCRIPTION NAME NUMBER I/O MAIN LINK INPUT PINS IN0p 2 DisplayPort Main Link Channel 0 Differential Input IN0n 3 I [100Ω diff] IN1p 5 DisplayPort Main Link Channel 1 Differential Input IN1n 6 MAIN LINK OUTPUT PINS OUT0p 13 DisplayPort Main Link Channel 0 Differential Output OUT0n 12 O [100Ω diff] OUT1p 10 DisplayPort Main Link Channel 1 Differential Output OUT1n 9 CONTROL PINS Enable. This input is a 3-level input. If the input is left open, the internal input biasing pulls the input level to VCC/2. The input can also be pulled high or low externally. This allows to configure the device for 1-channel mode, 2-channel mode or power down mode. 3-level Input EN 7 [CMOS] EN = HIGH: Device in Normal Mode, both outputs OUT1 and OUT2 are enabled; EN = VCC/2 (input left floating): Device in Normal mode, 2nd output is disabled; EN = LOW: Device in Power Down mode. All outputs are high-impedance; Inputs are ignored Configures the output pre-emphasis level. This input is a 3-level input. If the input is left open, the internal input 3-level Input PRE_CTL 1 biasing pulls the input level to VCC/2. The input can also be pulled high or low externally. This allows to configure [CMOS] the pre-emphasis for 3 different levels. See Table 1 for configuration details. Configures the output amplitude VOD level. This input is a 3-level input. If the input is left open, the internal input 3-level Input VOD_CTL 14 biasing pulls the input level to VCC/2. The input can also be pulled high or low externally. This allows to configure [CMOS] 3 different output swing amplitudes. See Table 1 for configuration details. Configures the EQ input setting for both differential inputs. This input is a 3-level input. If the input is left open, the internal input biasing pulls the input level to VCC/2. The input can also be pulled high or low externally. This allows to configure the pre-emphasis for 3 different levels. 3-level Input EQ_CTL 8 [CMOS] EQ_CTL = LOW: 0dB (EQ turned off) EQ_CTL = VCC/2 (input left floating): 3dB fixed EQ EQ_CTL = HIGH (input tied to VCC): 6dB fixed EQ SUPPLY AND GROUND PINS VCC 4, 11 pwr 3.3V Supply GND thermal pad pwr Ground Note: (H) Logic High: (L) Logic Low Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: SN75DP119 |
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