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LP2996AMRE/NOPB Datasheet(PDF) 6 Page - Texas Instruments

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Part # LP2996AMRE/NOPB
Description  DDR Termination Regulator
PDF  29 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LP2996AMRE/NOPB Datasheet(HTML) 6 Page - Texas Instruments

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LP2996A
SNOSCY7 – JUNE 2014
www.ti.com
Electrical Characteristics (continued)
Specifications are for TJ = 25°C and apply over the full Operating Temperature Range (TJ = 0°C to +125°C)
(1). Unless
otherwise specified, AVIN = PVIN = 2.5V, VDDQ = 2.5V
(2).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VTT Output Voltage (DDR III)
(3)
IOUT = 0A, AVIN = 2.5 V
PVIN = VDDQ = 1.35V
0.656
0.677
0.698
PVIN = VDDQ = 1.5 V
0.731
0.752
0.773
PVIN = VDDQ = 1.6 V
0.781
0.802
0.823
IOUT = +0.2A, AVIN = 2.5V
0.667
0.688
0.710
PVIN = VDDQ = 1.35V
IOUT = -0.2A, AVIN = 2.5V
0.641
0.673
0.694
PVIN = VDDQ = 1.35V
V
IOUT = +0.4 A, AVIN = 2.5 V
0.740
0.763
0.786
PVIN = VDDQ = 1.5 V
IOUT = –0.4 A, AVIN = 2.5 V
0.731
0.752
0.773
PVIN = VDDQ = 1.5 V
IOUT = +0.5A, AVIN = 2.5 V
0.790
0.813
0.836
PVIN = VDDQ = 1.6 V
IOUT = -0.5 A, AVIN = 2.5 V
0.781
0.802
0.823
PVIN = VDDQ = 1.6 V
VOSVtt
IOUT = 0 A
–30
0
30
VTT Output Voltage Offset (VREF –
IOUT = –1.5 A
–30
0
30
VTT) for DDR I
(3)
IOUT = 1.5 A
–30
0
30
VTT Output Voltage Offset (VREF –
IOUT = 0 A
–30
0
30
VTT) for DDR II
(3)
IOUT = –0.5 A
–30
0
30
mV
IOUT = 0.5 A
–30
0
30
VTT Output Voltage Offset (VREF –
IOUT = 0 A
–30
0
30
VTT) for DDR III
(3)
IOUT = ±0.2 A
–30
0
30
IOUT = ±0.4 A
–30
0
30
IOUT = ±0.5 A
–30
0
30
IQ
Quiescent Current (4)
IOUT = 0 A
320
500
µA
ZVDDQ
VDDQ Input Impedance
100
k
Ω
ISD
Quiescent current in shutdown (4)
SD = 0 V
115
150
µA
IQ_SD
Shutdown leakage current
SD = 0 V
2
5
VIH
Minimum Shutdown High Level
1.9
V
VIL
Maximum Shutdown Low Level
0.8
SD = 0 V
Iv
VTT leakage current in shutdown
1
10
µA
VTT = 1.25 V
ISENSE
VSENSE Input current
13
nA
TSD
Thermal Shutdown (5)
165
°C
TSD_HYS
Thermal Shutdown Hysteresis
10
(4)
Quiescent current defined as the current flow into AVIN.
(5)
The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction to ambient thermal
resistance,
θJA, and the ambient temperature, TA. Exceeding the maximum allowable power dissipation will cause excessive die
temperature and the regulator will go into thermal shutdown.
6
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Copyright © 2014, Texas Instruments Incorporated
Product Folder Links: LP2996A



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