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LP8555 Datasheet(PDF) 3 Page - Texas Instruments |
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LP8555 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 64 page  LEDA1 LEDA2 LEDA3 LEDA4 LEDA5 LEDA6 A B C FB_A PWM/ INT GND 1 2 3 TOP LEDB5 LEDB6 LEDB3 LEDB4 LEDB1 LEDB2 GND EN VDDIO FB_B SW_A SW_A GND SW_A GND SW_A GND FSET/ SDA SW_A GND SW_A VLDO GND ISET/ SCL GND SW_B GND SW_B SW_B SW_B VDD GND SW_B SW_B 4 5 6 D E F BOTTOM LEDA1 LEDA2 LEDA3 LEDA4 LEDA5 LEDA6 A B C FB_A PWM/ INT GND 1 2 3 LEDB5 LEDB6 LEDB3 LEDB4 LEDB1 LEDB2 GND EN VDDIO FB_B SW_A SW_A GND SW_A GND SW_A GND FSET/ SDA SW_A GND SW_A VLDO GND ISET/ SCL GND SW_B GND SW_B SW_B SW_B VDD GND SW_B SW_B 4 5 6 D E F LP8555 www.ti.com SNVS857 – FEBRUARY 2014 6 Terminal Configuration and Functions YFQ (DSBGA) 36 Bumps Terminal Functions TERMINAL TYPE DESCRIPTION NUMBER NAME A1, A2, A3, LEDAx A LED Bank A Current Sink Terminal. If unused, this terminal may be left floating. B1, B2, B3, A4, A5, A6, LEDBx A LED Bank A Current Sink Terminal. If unused, this terminal may be left floating. B4, B5, B6 C1 FB_A A Feedback terminal for the Bank A Boost Converter. C2 PWM/INT I Dual function terminal. When BRTMODE = 00, 10, or 11, this is a PWM input terminal. When BRTMODE = 01, this terminal is a programmable interrupt terminal. In this mode, this is an open drain output that pulls low when a fault condition occurs. C3, C4, D3, D4 GND G Ground for analog and digital blocks. These terminals should be connected to a noise-free GND plane if possible (separate plane than GND_SW_x terminals). C5 EN/VDDIO I Backlight Enable terminal and VDDIO power terminal + reference terminal for I2C communication. This terminal should be connected to IO voltage with low impedance route to avoid voltage ripple on this terminal. C6 FB_B A Feedback terminal for the Bank B Boost Converter. D1, E1, F1 SW_A A Bank A Boost Converter Switch D2, E2, F2 GND_SW_A G Bank A Boost Converter Switch Ground. These terminals can be connected to noisy GND due to high current spikes. D5, E5, F5 GND_SW_B G Bank B Boost Converter Switch Ground. These terminals can be connected to noisy GND due to high current spikes. D6, E6, F6 SW_B A Bank B Boost Converter Switch E3 FSET/SDA I/O/A Dual Function terminal. When I2C is not used (for example, BRTMODE = 00), this terminal can be used to set the boost switching frequency and/or LED PWM frequency by connecting a resistor between the terminal and a ground reference. When I2C is used (for example, BRTMODE = 01, 10, or 11), this terminal is connected to a SDA line of an I2C bus. E4 ISET/SCL I/A Dual Function terminal. When I2C is not used (for example, if BRTMODE=00), this terminal can be used to set the full-scale LED current by connecting a resistor between the terminal and a ground reference. When I2C is used (for example, BRTMODE = 01, 10, or 11), this terminal is connected to a SCL line of an I2C bus. F3 VLDO P Internal LDO Output terminal. CVLDO bypass capacitor must be connected between this terminal and ground. F4 VDD P Device power supply terminal. Provide 2.7-V to 20-V supply to this terminal. This terminal is an input of the internal LDO regulator. The output of the internal LDO powers the device blocks. A: Analog, G: Ground Terminal, P: Power Terminal, I: Input Terminal, O: Output Terminal Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LP8555 |
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