REFERENCE DESIGN 2

PFC Stage

R4

BE

R15

V

V

R7

I

-

=

(1)

UCC28810

UCC28811

The PR788, shown in Figure 26 is a 100-W offline AC-to-DC LED current driver with power factor correction.

This design is a two stage converter design with a universal input boost follower PFC stage providing a 240-V to

400-V DC output and a low-side buck stage providing the current source to power the LEDs. This converter was

designed to support up to 30 high-brightness LEDs in series with up to 900-mA average current. The design

incorporates an interface for microprocessor control to allow for shutdown into a low power mode (< 0.5 W) and

PWM dimming of the LEDs.

The PFC stage is a critical conduction mode boost converter with a boost follower feature implemented. The

results in improved efficiency at low-line conditions. The minimum regulation point was set at 240 V to allow the

design to be scaled to power up to 50 LEDs in series.

The critical conduction mode (CRM) of operation offers advantages regarding losses over continuous conduction

mode. In CRM operation, since the inductor current reaches zero just before the beginning of the next cycle, the

boost diode reverse recovery loss is eliminated. Switching losses in the MOSFET are reduced as well by

programming a small delay after the inductor current reaches 0 A until the turn on of the MOSFET on the next

cycle. The voltage across the boost inductor begins discontinuous mode self oscillation which reduces the

MOSFET drain voltage at turn on, this delay is optimized to occur at the valley of the first self oscillation cycle.

In the PFC boost implementation, the controller programs the peak inductor current to twice the value of the

desired average line current. The current reference generator uses the VINS input and the EAOUT input to

program the peak current of the boost inductor. The VINS input is a divided sample of the rectified AC input

voltage which is determined by R9 and the sum of (R2 + R5), as shown in Figure 26.

The C6 capacitor is used for high frequency bypass and should not affect the line frequency signal on VINS. The

minimum boost output voltage is determined by the feedback divider consisting of R11 and (R13 + R15)

connected to the VSENSE pin. The boost follower circuit is hown in Figure 25.The boost follower function is

accomplished by Q1 sinking current through the high side of the feedback divider (R13 + R15). The AC input

rectified voltage is filtered and divided by R1, R3, R4, and C3. Ideally the filter minimizes the line frequency ripple

and generates a DC sample of the RMS input voltage. The ratio of R4 and (R1 + R3) determines the line voltage

which Q1 begins increasing the output by sinking current thru R13 and R15. R7 is determined by

1. determining the current through R13 and R15 that provides the desired increase in the boost output

2. determine the voltage across R4 at high line

.

22

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