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UCD3138128APFC Datasheet(PDF) 48 Page - Texas Instruments

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Part # UCD3138128APFC
Description  UCD3138128A Highly-Integrated Digital Controller For Isolated Power
PDF  83 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

UCD3138128APFC Datasheet(HTML) 48 Page - Texas Instruments

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UCD3138128A
SLUSC99 – JULY 2016
www.ti.com
Product Folder Links: UCD3138128A
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
9.3.13 Brownout
Brownout function is used to determine if the device supply voltage is lower than a threshold voltage, a condition
that may be considered unsafe for proper operation of the device.
The brownout threshold is higher than the reset threshold voltage; therefore, when the supply voltage is lower
than brownout threshold, it still does not necessarily trigger a device reset.
The brownout interrupt flag can be polled or alternatively can trigger an interrupt to service such case by an
interrupt service routine. Please see the Power On Reset (POR) / Brown Out Reset (BOR) section.
9.3.14 Global I/O
Up to 32 pins in UCD3138xA can be configured in the Global I/O register to serve as a general purpose input or
output pins (GPIO). This includes all digital input or output pins except for the RESET pin.
The pins that cannot be configured as GPIO pins are the supply pins, ground pins, ADC-12 analog input pins,
EADC analog input pins and the RESET pin. Additional digital pins not listed in this register can be configured
through their local configuration registers.
There are two ways to configure and use the digital pins as GPIO pins:
1. Through the centralized Global I/O control registers.
2. Through the distributed control registers in the specific peripheral that shares it pins with the standard GPIO
functionality.
The Global I/O registers offer full control of:
1. Configuring each pin as a GPIO.
2. Setting each pin as input or output.
3. Reading the pin’s logic state, if it is configured as an input pin.
4. Setting the logic state of the pin, if it is configured as an output pin.
5. Connecting pin/pins to high rail through internal push/pull drivers or external pull up resistors.
The Global I/O registers include Global I/O EN register, Global I/O OE Register, Global I/O Open Drain Control
Register, Global I/O Value Register and Global I/O Read Register.
Table 6 shows the format of Global I/O EN Register (GLBIOEN) as an example:
Table 6. Global I/O EN Register (GLBIOEN)
BIT NUMBER
31:0
Bit Name
GLOBAL_IO_EN
Access
R/W
Default
0000_0000_0000_0000_0000_0000_0000_0000
Bits 31-0: GLOBAL_IO_EN – This register enables the global control of digital I/O pins
0 = Control of IO is done by the functional block assigned to the IO (Default)
1 = Control of IO is done by Global IO registers.
BIT
PIN_NAME
PIN NUMBER
UCD3138xA
31
PWM2
11
30
PWM3
12
29
FAULT3
55
28
ADC_EXT_TRIG
14
27
TCK
45
26
TDO
46
25
TMS
48
24
TDI
47
23
SCI_TX1
37
22
SCI_TX0
35



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