AS4C2M32S datasheet(1/53 Pages) ALSC

Part #	AS4C2M32S

Description	AS4C2M32S

PDF	53 Pages

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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AS4C2M32S

Confidential

1

Rev. 3.0

Dec. /2012

2M x 32 bit Synchronous DRAM (SDRAM)

Confidential

Advanced (Rev. 3.0, Dec. /2012)

Features

 Fast access time: 5.4/5.4 ns

 Fast Clock rate: 166/143 MHz

 Fully synchronous operation

 Internal pipelined architecture

 Four internal banks (512K x 32bit x 4bank)

 Programmable Mode

- CAS Latency: 2 or 3

- Burst Length: 1, 2, 4, 8, or full page

- Burst Type: Sequential or Interleaved

- Burst-Read-Single-Write

 Burst stop function

 Individual byte controlled by DQM0-3

 Auto Refresh and Self Refresh

 Operating temperature range

- Commercial (0 ~ 70°C)

- Industrial (-40 ~ 85°C)

 4096 refresh cycles/64ms

 Single +3.3V ± 0.3V power supply

 Interface: LVTTL

 90-ball 8 x 13 x 1.2mm TFBGA package

- Pb and Halogen Free

Overview

The 64Mb SDRAM is a high-speed CMOS

synchronous DRAM containing 64 Mbits. It is

internally configured as a quad 512K x 32 DRAM

with a synchronous interface (all signals are

registered on the positive edge of the clock signal,

CLK). Each of the 512K x 32 bit banks is organized

as 2048 rows by 256 columns by 32 bits. Read and

write accesses to the SDRAM are burst oriented;

accesses start at a selected location and continue for

a programmed number of locations in a programmed

sequence. Accesses begin with the registration of a

BankActivate command which is then followed by a

Read or Write command.

The SDRAM provides for programmable Read

or Write burst lengths of 1, 2, 4, 8, or full page, with a

burst termination option. An auto precharge function

may be enabled to provide a self-timed row

precharge that is initiated at the end of the burst

sequence. The refresh functions, either Auto or Self

Refresh are easy to use.

By having a programmable mode register, the

system can choose the most suitable modes to

maximize its performance. These devices are well

suited for applications requiring high memory

bandwidth.

Table 1. Key Specifications

AS4C2M32S

-6/7

tCK3

Clock Cycle time(min.)

6/7

ns

tAC3

Access time from CLK (max.)

5.4/5.4 ns

tRAS

Row Active time(min.)

42/42 ns

tRC

Row Cycle time(min.)

60/63 ns

Table 2.Ordering Information

Part Number

Frequency

Package

Temperature

Temp Range

AS4C2M32S-6BIN

166MHz

90-ball TFBGA

Industrial

-40 ~ 85°C

AS4C2M32S-7BCN

143MHz

90-ball TFBGA

Commercial

0 ~ 70°C

B: indicates 90-ball (8 x 13 x 1.2mm) TFBGA package

N: indicates Pb and Halogen Free

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