Time (ns)

0

0.5

1

1.5

2

-0.4

-0.2

0.0

0.2

0.4

Time (ns)

0

0.5

1

1.5

2

-0.4

-0.2

0.0

0.2

0.4

Time (ns)

0

0.5

1

1.5

2

-0.4

-0.2

0.0

0.2

0.4

11

TUSB211, TUSB211I, TUSB211-Q1

www.ti.com

SLLSEO0C – MAY 2015 – REVISED JUNE 2016

Product Folder Links: TUSB211 TUSB211I TUSB211-Q1

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Copyright © 2015–2016, Texas Instruments Incorporated

Figure 5. EQ Level 1

Figure 6. EQ Level 2

Figure 7. EQ Level 3

9 Power Supply Recommendations

On power up, the interaction of the RSTN pin and power on ramp could result in digital circuits not being set

correctly. The device should not be enabled until the power on ramp has settled to 3 V or higher to guarantee a

correct power on reset of the digital circuitry. If RSTN cannot be held low by microcontroller or other circuitry until

the power on ramp has settled, then an external capacitor from the RSTN pin to GND is required to hold the

device in the low power reset state.

internal pullup resistance of 500 k

Ω, the recommended minimum external capacitance is calculated as:

[Ramp Time x 5] ÷ [500 k

Ω]

(1)