ADT7476AARQZ-R datasheet(30/69 Pages) ONSEMI

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ADT7476A

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The fan counter does not count the fan TACH output

pulses directly because the fan speed could be less than

1,000 RPM, and it takes several seconds to accumulate a

reasonably large and accurate count. Instead, the period of

the fan revolution is measured by gating an on-chip 90 kHz

oscillator into the input of a 16-bit counter for N periods of

the fan TACH output (Figure 45), so the accumulated count

is actually proportional to the fan tachometer period and

inversely proportional to the fan speed.

N, the number of pulses counted, is determined by the

settings of TACH pulses per revolution register (0x7B). This

(default), three, or four TACH pulses to be counted.

Figure 45. Fan Speed Measurement

CLOCK

PWM

TACH

Fan TachometerReading Registers

The fan tachometer readings are 16-bit values consisting

of a 2-byte read from the ADT7476A.

Table 35. FAN TACHOMETER READING REGISTERS

Description

Default

0x28

TACH1 Low Byte

0x00

0x29

TACH1 High Byte

0x00

0x2A

TACH2 Low Byte

0x00

0x2B

TACH2 High Byte

0x00

0x2C

TACH3 Low Byte

0x00

0x2D

TACH3 High Byte

0x00

0x2E

TACH4 Low Byte

0x00

0x2F

TACH4 High Byte

0x00

Reading Fan Speed from the ADT7476A

The measurement of fan speeds involves a 2-register read

for each measurement. The low byte should be read first.

This causes the high byte to be frozen until both high and

low byte registers have been read, preventing erroneous

TACH readings. The fan tachometer reading registers report

back the number of 11.11

ms period clocks (90 kHz

oscillator) gated to the fan speed counter from the rising

edge of the first fan TACH pulse to the rising edge of the

third fan TACH pulse (assuming two pulses per revolution

are being counted).

Because the device is essentially measuring the fan TACH

period, the higher the count value, the slower the fan is

actually running. A 16-bit fan tachometer reading of

0xFFFF indicates that either the fan has stalled or is running

very slowly (<100 RPM).

High Limit: > Comparison Performed

Because the actual fan TACH period is being measured,

falling below a fan TACH limit by 1 sets the appropriate

status bit and can be used to generate an SMBALERT.

Measuring fan TACH has the following caveat: When the

ADT7476A starts up, TACH measurements are locked. In

effect, an internal read of the low byte has been made for

each TACH input. The net result of this is that all TACH

readings are locked until the high byte is read from the

corresponding

TACH

registers.

All

TACH-related

interrupts are also ignored until the appropriate high byte is

read.

Once the corresponding high byte has been read, TACH

measurements are unlocked and interrupts are processed as

normal.

Fan TACH Limit Registers

The fan TACH limit registers are 16-bit values consisting

of two bytes.

Table 36. FAN TACH LIMIT REGISTERS

Description

Default

0x54

TACH1 Minimum Low Byte

0xFF

0x55

TACH1 Minimum High Byte

0xFF

0x56

TACH2 Minimum Low Byte

0xFF

0x57

TACH2 Minimum High Byte

0xFF

0x58

TACH3 Minimum Low Byte

0xFF

0x59

TACH3 Minimum High Byte

0xFF

0x5A

TACH4 Minimum Low Byte

0xFF

0x5B

TACH4 Minimum High Byte

0xFF

Fan Speed Measurement Rate

The fan TACH readings are normally updated once every

second.

When set, the FAST bit (Bit 3) of Configuration

250 ms.

DC Bits

If any of the fans are not being driven by a PWM channel

but are powered directly from 5.0 V or 12 V, their associated

dc bit in Configuration Register 3 should be set. This allows

TACH readings to be taken on a continuous basis for fans

connected directly to a dc source. Once high frequency

mode is enabled in 4-wire fans, the dc bits do not need to be

set because this is automatically done internally.

Calculating Fan Speed

Assuming a fan with two pulses per revolution, and with

the ADT7476A programmed to measure two pulses per

revolution, fan speed is calculated by:

Fan Speed (RPM) = (90,000

× 60)/Fan TACH Reading

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