UCS1003-1 datasheet(33/138 Pages) MICROCHIP

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DS20005346B-page 33

UCS1003-1/2/3

5.1

UCS1003-1/2/3 Power States

The UCS1003-1/2/3 has the following power states

listed in Table 5-1.

TABLE 5-1:

POWER STATES DESCRIPTION

State

Description

Off

This power state is entered when the voltage at the VDD pin voltage is < VDD_TH. In this state, the device

is considered “off”. The UCS1003-1/2/3 devices will not retain their digital states. UCS1003-1 will not

retain register contents, nor respond to SMBus/I2C communications. The port power switch, bypass

switch and the high-speed data switches will be off. See Section 5.1.1 “OFF State Operation”.

Sleep

This is the lowest power state available. While in this state, the UCS1003-1/2/3 devices will retain digital

functionality and respond to changes in emulation controls. UCS1003-1 will wake to respond to SMBus/I2C

communications. The high-speed switch and all other functionality will be disabled. See Section 5.1.2

“Sleep State Operation”

Detect

This is a low-current power state. In this state, the device is actively looking for a portable device to be

attached. The high-speed switch is disabled by default. While in this state, the UCS1003-1 will retain the

configuration and charge rationing data, but it will not monitor the bus current. SMBus/I2C

communications will be fully functional. See Section 5.1.3 “Detect State Operation”.

Error

This power state is entered when a Fault condition exists. See Section 5.1.5 “Error State Operation”.

Active

This power state provides full functionality. While in this state, operations include activation of the port

power switch, USB data line handshaking/charger emulation, current limiting and charge rationing. See

Section 5.1.4 “Active State Operation”

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