UCS1003-1 datasheet(73/138 Pages) MICROCHIP

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 2014-2015 Microchip Technology Inc.

DS20005346B-page 73

UCS1003-1/2/3

10.3.3

PIN STATUS REGISTER

The Pin Status register reflects the current pin state of the

external control pins, as well as identifying the power

state. These bits are linked to the X_SET bits (see

Section 10.4.3 “Switch Configuration Register”

PIN STATUS REGISTER (ADDRESS 14h)

U-0

R-0

—

PWR_EN_PIN

M2_PIN

M1_PIN

EM_EN_PIN

SEL_PIN

PWR_STATE<1:0>(1)

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented:

Read as ‘0’

bit 6

PWR_EN_PIN:

PWR_EN Pin Control Status bit

Reflects the PWR_EN control state. This bit is set and cleared automatically as the PWR_EN

pin/PWR_ENS bit state changes.

= PWR_EN is logic ‘1’

= PWR_EN is logic ‘0’

bit 5

M2_PIN:

M2 Pin Control Status bit

Reflects the M2 pin state. This bit is set and cleared automatically as the M2 pin/M2_SET state changes.

= M2 is logic ‘1’

= M2 is logic ‘0’

bit 4

M1_PIN:

M1 Pin Control Status bit

Reflects the M1 pin state. This bit is set and cleared automatically as the M1 pin/M1_SET state changes.

= M1 is logic ‘1’

= M1 is logic ‘0’

bit 3

EM_EN_PIN:

EM_EN Pin Control Status bit

Reflects the EM_EN pin state. This bit is set and cleared automatically as the EM_EN pin/EM_EN_SET

state changes.

= EM_EN is logic ‘1’

= EM_EN logic ‘0’

bit 2

SEL_PIN:

SEL Pin Control Status bit

Reflects the polarity settings determined by the SEL pin decode. This bit is set or cleared automatically

upon device power-up as the SEL pin is decoded.

= The PWR_EN control is active-high

= The PWR_EN control is active-low

bit 1-0

PWR_STATE<1:0>:

Power State Control Status bits(1)

Indicates the current power state. These bits are set and cleared automatically as the power state

changes.

= Sleep

= Detect

= Active

= Error

Note 1:

Accessing the SMBus/I2C causes the UCS1003-1 to leave the Sleep state. As a result, the

PWR_STATE<1:0> bits will never read as ‘00b’.

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