S25FS064S datasheet(49/147 Pages) CYPRESS

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Document Number: 002-03631 Rev. *C

Page 49 of 147

S25FS064S

PRELIMINARY

9.6.1

Status Registers 1

9.6.1.1

Status Register 1 Non-Volatile (SR1NV)

Related Commands: Write Registers (WRR 01h), Read Any Register (RDAR 65h), Write Any Register (WRAR 71h)

Status Register Write Non-volatile (SRWD_NV) SR1NV[7]

: Places the device in the Hardware Protected mode when this bit is set

to 1 and the WP# input is driven low. In this mode, the Write Registers (WRR) and Write Any Register (WRAR) commands (that

select status register-1 or configuration register-1) are ignored and not accepted for execution, effectively locking the state of the

Status Register-1 and Configuration Register-1 (SR1NV, SR1V, CR1NV, or CR1V) bits, by making the registers read-only. If WP# is

high, Status Register-1 and Configuration Register-1 may be changed by the WRR or WRAR commands. If SRWD_NV is 0, WP#

has no effect and Status Register-1 and Configuration Register-1 may be changed by the WRR or WRAR commands. WP# has no

effect on the writing of any other registers. The SRWD_NV bit has the same non-volatile endurance as the main Flash array. The

SRWD (SR1V[7]) bit serves only as a copy of the SRWD_NV bit to provide zero read latency.

Program Error Default (P_ERR_D) SR1NV[6]

: Provides the default state for the Programming Error Status in SR1V[6]. This bit is

not user programmable.

Configuration Register-3

Non-volatile/OTP

7:0

CR3NV[7:0]

Volatile

7:0

CR3V[7:0]

Configuration Register-4

Non-volatile/OTP

7:0

CR4NV[7:0]

Volatile

7:0

CR4V[7:0]

ECC Status Register

Volatile

Read Only

7:0

ECCSRV[7:0]

ASP Register

OTP

15:0

ASPR[15:0]

Password Register

OTP

63:0

PASS[63:0]

PPB Lock Register

Volatile

Read Only

7:0

PPBL[7:0]

PPB Access Register

Non-volatile

7:0

PPBAR[7:0]

DYB Access Register

Volatile

7:0

DYBAR[7:0]

SPI DDR Data Learning Registers

OTP

7:0

NVDLR[7:0]

Volatile

7:0

VDLR[7:0]

Table 9.10 Status Register-1 Non-Volatile (SR1NV)

Bits

Field Name

Function

Type

Default State

Description

SRWD_NV

Status Register

Write Disable

Default

Non-Volatile

1 = Locks state of SRWD, BP, and configuration register-1 bits when WP# is low by not

executing WRR or WRAR commands that would affect SR1NV, SR1V, CR1NV, or CR1V.

0 = No protection, even when WP# is low

P_ERR_D

Programming Error

Default

Non-Volatile

Read Only

Provides the default state for the Programming Error Status. Not user programmable.

E_ERR_D

Erase Error

Default

Non-Volatile

Read Only

Provides the default state for the Erase Error Status. Not user programmable.

BP_NV2

Block Protection

Non-Volatile

000b

Protects the selected range of sectors (Block) from Program or Erase when the BP bits are

configured as non-volatile (CR1NV[3]=0). Programmed to 111b when BP bits are

configured to volatile (CR1NV[3]=1).- after which these bits are no longer user

programmable.

BP_NV1

BP_NV0

WEL_D

WEL Default

Non-Volatile

Read Only

Provides the default state for the WEL Status. Not user programmable.

WIP_D

WIP Default

Non-Volatile

Read Only

Provides the default state for the WIP Status. Not user programmable.

Table 9.9 Register Descriptions (Continued)

Type

Bits

Abbreviation

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