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DM9161 Datasheet(PDF) 34 Page - List of Unclassifed Manufacturers |
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DM9161 Datasheet(HTML) 34 Page - List of Unclassifed Manufacturers |
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34 / 47 page ![]() DM9161 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver 34 Final Version: DM9161-DS-F02 May 10,2002 9.4.3 MDC/MDIO Timing Symbol Parameter Min. Typ. Max. Unit Conditions t0 MDC Cycle Time 80 --- --- ns t1 MDIO Setup Before MDC 10 --- --- ns When OUTPUT By STA t2 MDIO Hold After MDC 10 --- --- ns When OUTPUT By STA t3 MDC To MDIO Output Delay 0 --- 300 ns When OUTPUT By DM9161 9.4.4 MDIO Timing When OUTPUT by STA MDC t1 MDIO 10ns (Min) t2 10ns (Min) t0 9.4.5 MDIO Timing When OUTPUT by DM9161 MDC t3 MDIO 0 - 300 ns t0 |
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