MCP79402-ISLASHST datasheet(40/62 Pages) MICROCHIP

40 / 62 page

MCP79400/MCP79401/MCP79402

DS20005009F-page 40

 2011-2016 Microchip Technology Inc.

6.2.5

PROTECTED EEPROM CURRENT

ADDRESS READ

The MCP7940X contains an address counter that

maintains the address of the last byte accessed,

internally incremented by one. Therefore, if the

previous read access was to address n (n is any legal

address), the next current address read operation

would access data from address n + 1.

Upon receipt of the control byte with R/W bit set to ‘1’,

the MCP7940X issues an Acknowledge and transmits

the 8-bit data word. The master will not acknowledge

the transfer but generate a Stop condition and the

MCP7940X discontinues transmission (Figure 6-8).

FIGURE 6-8:

PROTECTED EEPROM

CURRENT ADDRESS

READ

6.2.6

PROTECTED EEPROM RANDOM

READ

Random read operations allow the master to access

any EEPROM location in a random manner. To perform

this type of read operation, first the address must be set

This is done by sending the address to the MCP7940X

as part of a write operation (R/W bit set to ‘0’). After the

address is sent, the master generates a Start condition

following the Acknowledge. This terminates the write

operation, but not before the internal Address Pointer is

set. Then, the master issues the control byte again but

with the R/W bit set to a ‘1’. The MCP7940X will then

issue an Acknowledge and transmit the 8-bit data word.

The master will not acknowledge the transfer but it will

generate a Stop condition which causes the

MCP7940X to discontinue transmission (Figure 6-9).

After a random Read command, the internal address

counter will point to the address location following the

one that was just read.

6.2.7

PROTECTED EEPROM

SEQUENTIAL READ

Sequential reads are initiated in the same way as a

random read except that after the MCP7940X transmits

the first data byte, the master issues an Acknowledge

as opposed to the Stop condition used in a random

read. This Acknowledge directs the MCP7940X to

transmit the next sequentially addressed 8-bit word

(Figure 6-10). Following the final byte transmitted to the

master, the master will NOT generate an Acknowledge

but a Stop condition. To provide sequential reads, the

MCP7940X contains an internal Address Pointer which

is incremented by one at the completion of each

operation. This Address Pointer allows the entire

protected EEPROM block to be serially read during one

operation.

The

internal

Address

Pointer

will

automatically roll over from address 0xF7 to address

0xF0 if the master acknowledges the byte received

from address 0xF7.

FIGURE 6-9:

PROTECTED EEPROM RANDOM READ

FIGURE 6-10:

PROTECTED EEPROM SEQUENTIAL READ

Note:

The Address Pointer is shared between

the SRAM/RTCC registers and the

protected EEPROM.

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

DATA

BYTE

11 1

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

ADDRESS

BYTE

CONTROL

BYTE

DATA

BYTE

S 101 0

111

S 1 010

11 1

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

DATA n

DATA n + 1

DATA n + 2

DATA n + X

MCP79402-I/ST Datasheet(PDF) 40 Page - Microchip Technology

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