LAN9250 datasheet(159/421 Pages) MICROCHIP

159 / 421 page

 2015 Microchip Technology Inc.

DS00001913A-page 159

LAN9250

11.11 TX Data Path Operation

Data is queued for transmission by writing it into the TX Data FIFO. Each packet to be transmitted may be divided among

multiple buffers. Each buffer starts with a two DWORD TX command (TX command ‘A’ and TX command ‘B’). The TX

command instructs the device on the handling of the associated buffer. Packet boundaries are delineated using control

bits within the TX command.

The host provides a 16-bit Packet Tag field in the TX command. The Packet Tag value is appended to the corresponding

TX status DWORD. All Packet Tag fields must have the same value for all buffers in a given packet. If tags differ between

buffers in the same packet the TXE error will be asserted. Any value may be chosen for a Packet Tag as long as all tags

in the same Packet are identical. Packet Tags also provide a method of synchronization between transmitted packets

and their associated status. Software can use unique Packet Tags to assist with validating matching status completions.

Note:

The use of Packet Tags is not required by the hardware. This field can be used by the LAN software driver

for any application. Packet Tags is only one application example.

The Packet Length field in the TX command specifies the number of bytes in the associated packet. All Packet Length

fields must have the same value for all buffers in a given packet. Hardware compares the Packet Length field and the

actual amount of data received by the Ethernet controller. If the actual packet length count does not match the Packet

Length field as defined in the TX command, the Transmitter Error (TXE) flag is asserted.

The device can be programmed to start payload transmission of a buffer on a byte boundary by setting the “Data Start

Offset” field in the TX command. The “Data Start Offset” field points to the actual start of the payload data within the first

8 DWORDs of the buffer. Data before the “Data Start Offset” pointer will be ignored. When a packet is split into multiple

buffers, each successive buffer may begin on any arbitrary byte.

The device can be programmed to strip padding from the end of a transmit packet in the event that the end of the packet

does not align with the host burst boundary. This feature is necessary when the device is operating in a system that

always performs multi-word bursts. In such cases the device must guarantee that it can accept data in multiples of the

Burst length regardless of the actual packet length. When configured to do so, the device will accept extra data at the

end of the packet and will remove the extra padding before transmitting the packet. The device automatically removes

data up to the boundary specified in the Buffer End Alignment field specified in each TX command.

The host can instruct the device to issue an interrupt when the buffer has been fully loaded into the TX FIFO contained

in the device and transmitted. This feature is enabled through the TX command ‘Interrupt on Completion’ field.

Upon completion of transmission, irrespective of success or failure, the status of the transmission is written to the TX

Status FIFO. TX status is available to the host and may be read using PIO operations. An interrupt can be optionally

enabled by the host to indicate the availability of a programmable number TX status DWORDS.

Before writing the TX command and payload data to the TX FIFO, the host must check the available TX FIFO space by

performing a PIO read of the TX FIFO Information Register (TX_FIFO_INF). The host must ensure that it does not over-

fill the TX FIFO or the TX Error (TXE) flag will be asserted.

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