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LAN9250 Datasheet(PDF) 172 Page - Microchip Technology

Part # LAN9250
Description  Integrated Ethernet PHY with HP Auto-MDIX
PDF  421 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9250 Datasheet(HTML) 172 Page - Microchip Technology

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LAN9250
DS00001913A-page 172
 2015 Microchip Technology Inc.
11.12.1.1
Receive Data FIFO Fast Forward
The RX data path implements an automatic data discard function. Using the RX Data FIFO Fast Forward bit
(RX_FFWD) in the Receive Datapath Control Register (RX_DP_CTRL), the host can instruct the device to skip the
packet at the head of the RX Data FIFO. The RX Data FIFO pointers are automatically incremented to the beginning of
the next RX packet.
When performing a fast-forward, there must be at least 4 DWORDs of data in the RX Data FIFO for the packet being
discarded. For cases with less than 4 DWORDs, do not use RX_FFWD. In this case data must be read from the RX
Data FIFO and discarded using standard PIO read operations.
After initiating a fast-forward operation, do not perform any reads of the RX Data FIFO until the RX_FFWD bit is cleared.
Other resources can be accessed during this time (i.e., any registers and/or the other three FIFO’s). Also note that the
RX_FFWD will only fast-forward the RX Data FIFO, not the RX Status FIFO. After an RX fast-forward operation the RX
status must still be read from the RX Status FIFO.
The receiver does not have to be stopped to perform a fast-forward operation.
11.12.1.2
Force Receiver Discard (Receiver Dump)
In addition to the Receive data Fast Forward feature, device also implements a receiver “dump” feature. This feature
allows the host processor to flush the entire contents of the RX Data and RX Status FIFOs. When activated, the read
and write pointers for the RX Data and Status FIFO’s will be returned to their reset state. To perform a receiver dump,
the device receiver must be halted. Once the receiver stop completion is confirmed, the RX_DUMP bit can be set in the
Receive Configuration Register (RX_CFG). The RX_DUMP bit is cleared when the dump is complete. For more infor-
mation on stopping the receiver, please refer to Section 11.12.4, "Stopping and Starting the Receiver". For more infor-
mation on the RX_DUMP bit, please refer to Section 11.14.2, "Receive Configuration Register (RX_CFG)," on
page 178.
11.12.2
RX PACKET FORMAT
The RX status words can be read from the RX Status FIFO port, while the RX data packets can be read from the RX
Data FIFO. RX data packets are formatted in a specific manner before the host can read them as shown in Figure 11-
17. It is assumed that the host has previously read the associated status word from the RX Status FIFO, to ascertain
the data size and any error conditions.
FIGURE 11-17:
RX PACKET FORMAT
ofs + First Data DWORD
.
.
.
.
Last Data DWORD
0
31
Host Read
Order
1st
2nd
Last
Optional Pad DWORD0
.
.
Optional Pad DWORDn
Optional offset DWORD0
.
.
Optional offset DWORDn



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