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LAN9250 Datasheet(PDF) 186 Page - Microchip Technology |
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LAN9250 Datasheet(HTML) 186 Page - Microchip Technology |
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186 / 421 page  LAN9250 DS00001913A-page 186 2015 Microchip Technology Inc. 11.14.9 HOST MAC CSR INTERFACE DATA REGISTER (MAC_CSR_DATA) This read-write register is used in conjunction with the Host MAC CSR Interface Command Register (MAC_CSR_CMD) to indirectly access the Host MAC CSRs. Note: The full list of Host MAC CSRs are described in Section 11.15, "Host MAC Control and Status Registers," on page 192. Offset: 0A8h Size: 32 bits Bits Description Type Default 31:0 Host MAC CSR Data This field contains the value read from or written to the Host MAC CSR as specified in the Host MAC CSR Interface Command Register (MAC_CS- R_CMD). Upon a read, the value returned depends on the R/nW bit in the MAC_CSR_CMD register. If R/nW is a 1, the data in this register is from the Host MAC. If R/nW is 0, the data is the value that was last written into this register. Note: The MAC_CSR_CMD and MAC_CSR_DATA registers must not be modified until the CSR Busy bit is cleared in the MAC_CSR_CMD register. R/W 00000000h |
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