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LAN9250 Datasheet(PDF) 187 Page - Microchip Technology |
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LAN9250 Datasheet(HTML) 187 Page - Microchip Technology |
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187 / 421 page ![]() 2015 Microchip Technology Inc. DS00001913A-page 187 LAN9250 11.14.10 HOST MAC AUTOMATIC FLOW CONTROL CONFIGURATION REGISTER (AFC_CFG) This read/write register configures the mechanism that controls the automatic and software-initiated transmission of pause frames and back pressure from the Host MAC to the network. This register is used in conjunction with the Host MAC Flow Control Register (HMAC_FLOW) in the Host MAC CSR space. Pause frames and backpressure are sent to the network to stop it from sending packets to the Host MAC. Note: The Host MAC will not transmit pause frames or assert back pressure if the transmitter is disabled. Refer to section Section 11.2, "Flow Control," on page 139 for additional information. Offset: 0ACh Size: 32 bits Bits Description Type Default 31:24 RESERVED RO - 23:16 Automatic Flow Control High Level (AFC_HI) This field specifies, in multiples of 64 bytes, the level at which flow control will trigger. When this limit is reached, the chip will apply back pressure or will transmit a pause frame as programmed in bits [3:0] of this register. During full-duplex operation only a single pause frame is transmitted when this level is reached. The pause time transmitted in this frame is programmed in the FCPT field of the Host MAC Flow Control Register (HMAC_FLOW) in the Host MAC CSR space. During half-duplex operation each incoming frame that matches the criteria in bits [3:0] of this register will be jammed for the period set in the BACK_DUR field. R/W 00h 15:8 Automatic Flow Control Low Level (AFC_LO) This field specifies, in multiples of 64 bytes, the level at which a pause frame is transmitted with a pause time setting of zero. When the amount of data in the RX Data FIFO falls below this level the pause frame is transmitted. A pause time value of zero instructs the other transmitting device to immedi- ately resume transmission. The zero time pause frame will only be transmit- ted if the RX Data FIFO had reached the AFC_HI level and a pause frame was sent. A zero pause time frame is sent whenever automatic flow control in enabled in bits [3:0] of this register. Note: When automatic flow control is enabled the AFC_LO setting must always be less than the AFC_HI setting. R/W 00h 7:4 Backpressure Duration (BACK_DUR) When the Host MAC automatically asserts back pressure, it will be asserted for this period of time. In full-duplex mode, this field has no function and is not used. Please refer to Table 11-16, describing Backpressure Duration bit map- ping for more information. R/W 0h 3 Flow Control on Multicast Frame (FCMULT) When this bit is set, the Host MAC will assert back pressure when the AFC level is reached and a multicast frame is received. This field has no function in full-duplex mode. 0: Flow Control on Multicast Frame Disabled 1: Flow Control on Multicast Frame Enabled R/W 0b |
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