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LAN89730 Datasheet(PDF) 122 Page - Microchip Technology |
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LAN89730 Datasheet(HTML) 122 Page - Microchip Technology |
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122 / 218 page ![]() LAN89730 DS60001348A-page 122 2013-2015 Microchip Technology Inc. 6.3.4 TRANSMIT CONFIGURATION REGISTER (TX_CFG) Address: 010h Size: 32 bits Bits Description Type Default 31:3 RESERVED RO - 2 Transmitter Enable (TX_ON) When this bit is set, the transmitter is enabled. Any data in the TX FIFO will be sent. This bit is cleared automatically when STOP_TX is set and the transmit- ter is halted. R/W 0b 1 Stop Transmitter (STOP_TX) When this bit is set, the transmitter will finish the current frame being read from the TX FIFO, and will then stop transmitting. When the transmitter has stopped, this bit will clear. All writes to this bit are ignored while this bit is high. Note: After this bit clears, there will be no TX Ethernet frame data in the TX data path. SC 0b 0 Transmit FIFO Flush Setting this bit will reset the TX FIFO pointers. SC 0b |
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