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LAN89730 Datasheet(PDF) 166 Page - Microchip Technology

Part # LAN89730
Description  Implements Reduced Power Operating Modes
PDF  218 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN89730 Datasheet(HTML) 166 Page - Microchip Technology

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LAN89730
DS60001348A-page 166
 2013-2015 Microchip Technology Inc.
6.4.3
MAC ADDRESS LOW REGISTER (ADDRL)
This register contains the lower 32 bits of the physical address of the MAC, where ADDRL[7:0] is the first octet of the
Ethernet frame.
Table 6-5 illustrates the byte ordering of the ADDRL and ADDRH registers with respect to the reception of the Ethernet
physical address.
As an example, if the desired Ethernet physical address is 12-34-56-78-9A-BC, the ADDRL and ADDRH registers would
be programmed as shown in Figure 6-1.
Address:
108h
Size:
32 bits
Note:
This register is protected by Reset Protection (RST_PROTECT).
Bits
Description
Type
Default
31:0
Physical Address [31:0]
This field contains the lower 32 bits (31:0) of the Physical Address of this MAC
device.
R/W
FFFF_FFFFh
TABLE 6-5:
ADDRL, ADDRH BYTE ORDERING
ADDRL, ADDRH
Order of Reception on Ethernet
ADDRL[7:0]
1st
ADDRL[15:8]
2nd
ADDRL[23:16]
3rd
ADDRL[31:24]
4th
ADDRH[7:0]
5th
ADDRH[15:8]
6th
FIGURE 6-1:
EXAMPLE ADDRL, ADDRH ADDRESS ORDERING
0x12
0
7
0x34
8
15
0x56
16
23
0x78
24
31
ADDRL
0x9A
0
7
0xBC
8
15
ADDRH
xx
16
23
xx
24
31



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