ACT8946A datasheet(7/37 Pages) ACTIVE-SEMI

7 / 37 page

ACT8946AQJ203-T

Rev 1.0, 08-Jul-16

ActivePMU and ActivePath are trademarks of Active-Semi.

7 -

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PIN DESCRIPTIONS CONT’D

NAME

DESCRIPTION

SCL

Clock Input for I2C Serial Interface.

SDA

Data Input for I2C Serial Interface. Data is read on the rising edge of SCL.

nSTAT

Active-Low Open-Drain Charger Status Output. nSTAT has a 8mA (typ) current limit, allowing it

to directly drive an indicator LED without additional external components. See the Charge Status

Indicator section for more information.

29, 30

BAT

Battery Charger Output. Connect this pin directly to the battery anode (+ terminal)

31, 32

VSYS

System Output Pin. Bypass to GA with a 10µF or larger ceramic capacitor.

CHGIN

Power Input for the Battery Charger. Bypass CHGIN to GA with a capacitor placed as close to

the IC as possible.

OUT2

Output Feedback Sense for REG2.

VP2

Power Input for REG2. Bypass to GP12 with a high quality ceramic capacitor placed as close to

the IC as possible.

SW2

Switching Node Output for REG2.

GP12

Power Ground for REG1 and REG2. Connect GA, GP12 and GP3 together at a single point as

close to the IC as possible.

SW1

Switching Node Output for REG1.

VP1

Power Input for REG1. Bypass to GP12 with a high quality ceramic capacitor placed as close to

the IC as possible.

NC1

No Connect. Not internally connected.

Exposed Pad. Must be soldered to ground on PCB.

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