MPC9230

MOTOROLA

7

TIMING SOLUTIONS

1. AC characteristics apply for parallel output termination of 50

Symbol

Characteristics

Min

Typ

Max

Unit

Condition

Crystal Interface Frequency Range

10

20

MHz

FREF_EXT Reference Frequency Range

10

2. The maximum frequency on FREF_EXT is a function of the max. VCO frequency and the M counter. M should be higher than 160 for stable PLL

operation

MHz

800

1500

MHz

Output Frequency

N = 11 (

÷1)

N = 00 (

÷2)

N = 01 (

÷4)

N = 10 (

÷8)

400

200

100

50

750.00

375.00

187.50

93.75

MHz

MHz

MHz

MHz

4. The frequency of S_CLOCK is limited to 10 MHz in serial programming mode. S_CLOCK can be switched at higher frequencies when used as

test clock in test mode 6. See application section for more details.

0

10

MHz

Minimum Pulse Width

(S_LOAD, P_LOAD)

50

ns

DC

Output Duty Cycle

45

50

55

%

Output Rise/Fall Time

0.05

0.3

ns

20% to 80%

Setup Time

S_DATA to S_CLOCK

S_CLOCK to S_LOAD

M, N to P_LOAD

20

20

20

ns

ns

ns

Hold Time

S_DATA to S_CLOCK

M, N to P_LOAD

20

20

ns

ns

Cycle-to-Cycle Jitter

N = 11 (

÷1)

N = 00 (

÷2)

N = 01 (

÷4)

N = 10 (

÷8)

80

90

130

160

ps

ps

ps

ps

Period Jitter

N = 11 (

÷1)

N = 00 (

÷2)

N = 01 (

÷4)

N = 10 (

÷8)

60

70

120

140

ps

ps

ps

ps

Maximum PLL Lock Time

10

ms

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com