L9779WD-SPI datasheet(18/141 Pages) STMICROELECTRONICS

18 / 141 page

Absolute maximum ratings

L9779WD-SPI

18/141

DocID027721 Rev 2

5.1

ESD protection

Test circuit according to HBM (EIA/JESD22-A114-B) and CDM (EIA/JESD22-C101-C).

OUTA, OUTB,

OUTC, OUTD

Half bridge output

With external diode vs

ground for negative

voltage

-1.0 to VB

(–2.0 dynamically for a short

time)

DO,

CAN_RX,K_RX,

OUT_VRS

-0.3 to VDD_IO, when

DO = VDD_IO = 19 V max

CS, CLK, DIN,

IN1, IN2, IN3,

IN4, IN5, IN6,

IN7, PWM,

IGNI1, IGNI2,

IGNI3, IGNI4

-0.3 to +19

CAN_TX

-0.3 to +19

CAN_H, CAN_L -

-18 to 40

K_TX

-0.3 to +19

K_LINE

-18 to 40

Table 3. Absolute maximum ratings (continued)

Parameter

Condition

Value

Unit

Table 4. ESD protection

Item

Condition

Min

Max

Unit

All pins

Electro static discharge voltage “Charged-device-model – CDM”

all pin(1)

-500

+500

All pins

Electro static discharge voltage “Charged-device-model – CDM”

corner pin (1,20,21,32,33,52,53,64)

-750

+750

All pins

ESD voltage HBM respect to GND

-2

Pins to connector(2) ESD voltage HBM respect to GND

-4

1. Except OUTA, B, C, D ±250 V.

2. Pins are LSa, LSb, LSc, LSd, IGNx, VTRK1-2, CAN_H, CAN_L, K_LINE, OUTA, B, C, D.

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