THS4502SLASH3 datasheet(2/40 Pages) TI1

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THS4503−EP

SGLS291A − APRIL 2005 − JANUARY 2012

www.ti.com

APPLICATION CIRCUIT DIAGRAM

f − Frequency − MHz

−80

−92

020

−74

THIRD-ORDER INTERMODULATION

DISTORTION

−62

100

−68

−86

−98

392 Ω

−

800 Ω

5 V

−5 V

VOUT

392 Ω

402 Ω

56.2 Ω

50 Ω

374 Ω

VOCM

2.5 V

−

VOCM

14 Bit/80 MSps

5 V

Vref

5 V

−5 V

0.1 μF 10 μF

THS4503

392 Ω

10 pF

1 μF

56.2 Ω

ADC

374 Ω

50 Ω

402 Ω

392 Ω

10 pF

24.9 Ω

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted(1)

UNIT

Supply voltage, VS

16.5 V

Input voltage, VI

±VS

Output current, IO (2)

150 mA

Differential input voltage, VID

4 V

Continuous power dissipation

See Dissipation Rating Table

Maximum junction temperature, TJ (3)

150°C

Maximum junction temperature, continuous

operation, long term reliability TJ (4)

125°C

Maximum junction temperature, to prevent

oscillation TJ (5)

60°C

Operating free-air temperature range, TA

−55°C to 60°C

Storage temperature range, Tstg

−65°C to 150°C

Lead temperature

1,6 mm (1/16 inch) from case for 10 seconds

300°C

HBM

4000 V

ESD ratings:

CDM

2000 V

ESD ratings:

100 V

(1) Stresses above these ratings may cause permanent damage.

Exposure to absolute maximum conditions for extended periods

may degrade device reliability. These are stress ratings only, and

functional operation of the device at these or any other conditions

beyond those specified is not implied.

(2) The THS450x may incorporate a PowerPAD on the underside of

the chip. This acts as a heatsink and must be connected to a

thermally dissipative plane for proper power dissipation. Failure

to do so may result in exceeding the maximum junction

temperature which could permanently damage the device. See

Texas Instruments technical brief SLMA002 for more information

about utilizing the PowerPAD thermally enhanced package.

(3) The absolute maximum temperature under any condition is

limited by the constraints of the silicon process.

(4) Long-term high-temperature storage and/or extended use at

maximum recommended operating conditions may result in a

reduction of overall device life. See Figure 1 for additional

information on thermal derating.

(5) See Maximum Die Temperature to Prevent Oscillation section in

the Application Information of this data sheet.

This integrated circuit can be damaged by ESD. Texas

Instruments recommends that all integrated circuits be

handled with appropriate precautions. Failure to observe

proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to

complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could

cause the device not to meet its published specifications.

PACKAGE DISSIPATION RATINGS

PACKAGE

θJC

θJA(1)

PACKAGE

θJC

(°C/W)

θJA()

(°C/W)

DGN (8 pin)

4.7

58.4

(1) This data was taken using the JEDEC standard High-K test PCB.

RECOMMENDED OPERATING CONDITIONS

MIN

NOM MAX UNIT

Supply voltage

Dual supply

±5

±7.5

Supply voltage

Single supply

4.5

Operating free-air temperature, TA

−55

°C

THS4502/3 Datasheet(PDF) 2 Page - Texas Instruments

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