List of figures

L6564H

4/35

Doc ID 022960 Rev 2

List of figures

Figure 1.

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2.

Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 3.

Typical system block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4.

Figure 5.

IC consumption vs. TJ. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6.

Figure 7.

Startup and UVLO vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 8.

Feedback reference vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 9.

Figure 10.

Figure 11.

OVP levels vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 12.

Figure 13.

Vcs clamp vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 14.

ZCD sink/source capability vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 15.

Figure 16.

Figure 17.

Line drop detection threshold vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 18.

VMULTpk - VVFF dropout vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 19.

Figure 20.

PFC_OK FFD threshold vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 21.

Multiplier characteristics @VFF=1 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 22.

Multiplier characteristics @VFF=3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 23.

Multiplier gain vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 24.

Gate drive clamp vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 25.

Gate drive output saturation vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 26.

Figure 27.

Figure 28.

Figure 29.

Figure 30.

Figure 31.

Output voltage setting, OVP and FFP functions: internal block diagram . . . . . . . . . . . . . . 18

Figure 32.

Voltage feedforward: squarer/divider (1/V2) block diagram and transfer characteristics . . 19

Figure 33.

RFF·CFF as a function of 3rd harmonic distortion introduced in the input current . . . . . . . 21

Figure 34.

THD optimizer circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 35.

THD optimization: standard TM PFC controller (left side) and L6564H (right side) . . . . . . 23

Figure 36.

Effect of boost inductor saturation on the MOSFET current and detection method . . . . . . 24

Figure 37.

Interface circuits that let the DC-DC converter’s controller IC disable the L6564H . . . . . . 25

Figure 38.

High voltage startup generator: internal schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 39.

Timing diagram: normal power-up and power-down sequences . . . . . . . . . . . . . . . . . . . . 26

Figure 40.

High voltage startup behavior during latch-off protection . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 41.

High voltage startup managing the DC-DC output short-circuit . . . . . . . . . . . . . . . . . . . . . 28

Figure 42.

Demonstration board EVL6564H - 100 W, wide-range mains: electrical schematic. . . . . . 29

Figure 43.

EVL6564H demonstration board: compliance to EN61000-3-2 standard . . . . . . . . . . . . . . 30

Figure 44.

EVL6564H demonstration board: compliance to JEITA-MITI standard . . . . . . . . . . . . . . . 30

Figure 45.

EVL6564H demonstration board: input current waveform @230 V -50 Hz - 100 W load . . 30

Figure 46.

EVL6564H demonstration board: input current waveform @100 V - 50 Hz - 100 W load . 30

Figure 47.

SO-14 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32