PC87363 datasheet(11/200 Pages) NSC

11 / 200 page

Table of Contents (Continued)

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11.0

Legacy Functional Blocks

11.1

KEYBOARD AND MOUSE CONTROLLER (KBC) .................................................................. 172

11.1.1

General Description ................................................................................................... 172

11.1.2

KBC Register Map ..................................................................................................... 172

11.1.3

KBC Bitmap Summary ............................................................................................... 172

11.2

FLOPPY DISK CONTROLLER (FDC) ..................................................................................... 173

11.2.1

General Description ................................................................................................... 173

11.2.2

FDC Register Map ..................................................................................................... 173

11.2.3

FDC Bitmap Summary ............................................................................................... 174

11.3

PARALLEL PORT .................................................................................................................... 175

11.3.1

General Description ................................................................................................... 175

11.3.2

Parallel Port Register Map ......................................................................................... 175

11.3.3

Parallel Port Bitmap Summary .................................................................................. 176

11.4

UART FUNCTIONALITY (SP1 AND SP2) ............................................................................... 178

11.4.1

General Description ................................................................................................... 178

11.4.2

UART Mode Register Bank Overview ....................................................................... 178

11.4.3

SP1 and SP2 Register Maps for UART Functionality ................................................ 179

11.4.4

SP1 and SP2 Bitmap Summary for UART Functionality ........................................... 181

11.5

IR FUNCTIONALITY (SP2) ..................................................................................................... 183

11.5.1

General Description ................................................................................................... 183

11.5.2

IR Mode Register Bank Overview ............................................................................. 183

11.5.3

SP2 Register Map for IR Functionality ...................................................................... 184

11.5.4

SP2 Bitmap Summary for IR Functionality ................................................................ 185

12.0

Device Characteristics

12.1

GENERAL DC ELECTRICAL CHARACTERISTICS ............................................................... 187

12.1.1

Recommended Operating Conditions ....................................................................... 187

12.1.2

Absolute Maximum Ratings ....................................................................................... 187

12.1.3

Capacitance .............................................................................................................. 187

12.1.4

Power Consumption under Recommended Operating Conditions ............................ 188

12.2

DC CHARACTERISTICS OF PINS, BY I/O BUFFER TYPES ................................................ 188

12.2.1

Input, CMOS Compatible ........................................................................................... 188

12.2.2

Input, PCI 3.3V .......................................................................................................... 188

12.2.3

Input, SMBus Compatible .......................................................................................... 189

12.2.4

Input, Strap Pin .......................................................................................................... 189

12.2.5

Input, TTL Compatible ............................................................................................... 189

12.2.6

Input, TTL Compatible with Schmitt Trigger .............................................................. 189

12.2.7

Output, PCI 3.3V ....................................................................................................... 190

12.2.8

Output, Totem-Pole Buffer ......................................................................................... 190

12.2.9

Output, Open-Drain Buffer ......................................................................................... 190

12.2.10 Exceptions ................................................................................................................. 190

12.3

INTERNAL RESISTORS ......................................................................................................... 191

12.3.1

Pull-Up Resistor ......................................................................................................... 191

12.3.2

Pull-Down Resistor .................................................................................................... 191

PC87363 Datasheet(PDF) 11 Page - National Semiconductor (TI)

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