TNETV2664FIDZWT datasheet(31/249 Pages) TI1

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TMS320C6424

www.ti.com

SPRS347D – MARCH 2007 – REVISED DECEMBER 2009

Table 2-7. BOOT Terminal Functions (continued)

SIGNAL

OTHER(2)

TYPE(1)

DESCRIPTION

ZWT

ZDU

(3)

NAME

NO.

EM_A[0]/

IPD

Selects EMIFA Pinout Mode

B17

C21

I/O/Z

GP[7]/(AEM2)

DVDD33

The C6424 supports the following EMIFA Pinout Modes:

EM_BA[0]/

IPD

C17

E20

I/O/Z

AEM[2:0] = 000, No EMIFA

GP[6]/(AEM1)

DVDD33

AEM[2:0] = 010, EMIFA (Async) Pinout Mode 2

AEM[2:0] = 101, EMIFA (NAND) Pinout Mode 5

EM_BA[1]/

IPD

C16

C20

I/O/Z

GP[5]/(AEM0)

DVDD33

This signal doesn't actually affect the EMIFA module. It only affects

how the EMIFA is pinned out.

Selects the EMIFA EM_CS2 default bus width

0 = 8-bit bus width

1 = 16-bit bus width

RMTXD0/GP[28]/

IPD

H16

J21

I/O/Z

This signal affects the EMIFA module's EM_CS2 space default

(8_16)

DVDD33

setting. It does not affect the pin out. To determine the actual EMIFA

pinout, the (AEM[2:0]) boot configuration settings must be set

appropriately.

PCI Enable

IPD

PCIEN

0 = PCI pin function is disabled

DVDD33

1 = PCI pin function is enabled

Endian selection

RMTXD1/GP[27]/

IPU

H17

L19

I/O/Z

0 = Big Endian

(LENDIAN)

DVDD33

1 = Little Endian

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