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TNETV2501INPGF Datasheet(PDF) 191 Page - Texas Instruments

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Part # TNETV2501INPGF
Description  Fixed-Point Digital Signal Processor
PDF  197 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TNETV2501INPGF Datasheet(HTML) 191 Page - Texas Instruments

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Mechanical Data
191
December 2002 − Revised November 2008
SPRS206K
Table 6−1. Thermal Resistance Characteristics (Ambient) (Continued)
PACKAGE
AIRFLOW (LFM)
BOARD TYPE†
RθJA (°C/W)
60
High-K
0
52
High-K
150
49
High-K
250
PGF
45
High-K
500
PGF
104
Low-K
0
81
Low-K
150
73
Low-K
250
64
Low-K
500
† Board types are as defined by JEDEC. Reference JEDEC Standard JESD51−9, Test Boards for Area Array Surface Mount Package Thermal
Measurements.
‡ Adding thermal vias will significantly improve the thermal performance of the device. To use the thermal balls on the GZZ and ZZZ packages:
− An array of 25 land pads must be added on the top layer of the PCB where the package will be mounted.
− The PCB land pads should be the same diameter as the vias in the package substrate for optimal Board Level Reliability Temperature Cycle
performance.
− The land pads on the PCB should be connected together and to PCB through-holes. The PCB through-holes should in turn be connected
to the ground plane for heat dissipation.
− A solid internal plane is preferred for spreading the heat.
Refer to the MicroStar BGA
E Packaging Reference Guide (literature number SSYZ015) for guidance on PCB design, surface mount, and
reliability considerations.
Table 6−2. Thermal Resistance Characteristics (Case)
PACKAGE
RθJC (°C/W)
BOARD TYPE†
GZZ, ZZZ
22
2s JEDEC Test Card
PGF
13.2
2s JEDEC Test Card
† Board types are as defined by JEDEC. Reference JEDEC Standard JESD51−9, Test Boards for Area Array Surface
Mount Package Thermal Measurements.



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