STM32F398VE datasheet(137/151 Pages) STMICROELECTRONICS

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STM32F398VE

Electrical characteristics

142

Figure 45. 12-bit buffered /non-buffered DAC

1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external

loads directly without the use of an external operational amplifier. The buffer can be bypassed by

configuring the BOFFx bit in the DAC_CR register.

6.3.21

Comparator characteristics

Update rate(3)

Max frequency for a correct

DAC_OUT change when

small variation in the input

code (from code i to i+1LSB)

CLOAD  50 pF,

RLOAD  5 k

MS/s

tWAKEUP(3)

Wakeup time from off state

(Setting the ENx bit in the

DAC Control register)

CLOAD  50 pF,

RLOAD  5 k

-6.5

µs

PSRR+ (1)

Power supply rejection ratio

(to VDDA) (static DC

measurement

CLOAD  50 pF,

No RLOAD  5 k

–67

–40

1. Guaranteed by design, not tested in production.

2. Quiescent mode refers to the state of the DAC a keeping steady value on the output, so no dynamic consumption is

involved.

3. Data based on characterization results, not tested in production.

Table 78. DAC characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 79. Comparator characteristics(1)

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

VDDA

Analog supply voltage

1.8

3.6

VIN

Comparator input voltage

range

-0

VDDA

VBG

Scaler input voltage

VREFINIT

VSC

Scaler offset voltage

±5

±10

tS_SC

Scaler startup time from

power down

0.2

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