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STM32L496QGI3STR Datasheet(PDF) 178 Page - STMicroelectronics |
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STM32L496QGI3STR Datasheet(HTML) 178 Page - STMicroelectronics |
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178 / 263 page  Electrical characteristics STM32L496xx 178/263 DocID029173 Rev 2 THD Total harmonic distortion ADC clock frequency ≤ 80 MHz, Sampling rate ≤ 5.33 Msps, VDDA = VREF+ = 3 V, TA = 25 °C Single ended Fast channel (max speed) - -74 -73 dB Slow channel (max speed) - -74 -73 Differential Fast channel (max speed) - -79 -76 Slow channel (max speed) - -79 -76 1. Guaranteed by design. 2. ADC DC accuracy values are measured after internal calibration. 3. ADC accuracy vs. negative Injection Current: Injecting negative current on any analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject negative current. 4. The I/O analog switch voltage booster is enable when VDDA < 2.4 V (BOOSTEN = 1 in the SYSCFG_CFGR1 when VDDA < 2.4 V). It is disable when VDDA ≥ 2.4 V. No oversampling. Table 77. ADC accuracy - limited test conditions 1(1)(2)(3) (continued) Sym- bol Parameter Conditions(4) Min Typ Max Unit |
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